# Learning from Hypervectors:
A Survey on Hypervector Encoding

Sercan Aygun  ID , Mehran Shoushtari Moghadam  ID ,
M. Hassan Najafi  ID , , and Mohsen Imani  ID This work was supported in part
by the National Science Foundation (NSF) under Grant 2127780 and Grant
2019511; in part by the Semiconductor Research Corporation (SRC) Task under
Grant 2988.001; in part by the Department of the Navy, Office of Naval
Research, under Grant N00014-21-1-2225 and Grant N00014-22-1-2067; in part by
the Air Force Office of Scientific Research; in part by the Louisiana Board of
Regents Support Fund under Grant LEQSF(2020-23)-RD-A-26; and in part by Cisco,
Xilinx, and NVIDIA.
Sercan Aygun is with Sch. Comp. and Info., Univ. of Louisiana at Lafayette,
70503 Lafayette, LA, USA (e-mail: sercan.aygun@louisiana.edu).
Mehran Shoushtari Moghadam is with Sch. Comp. and Info., Univ. of Louisiana at
Lafayette, 70503 Lafayette, LA, USA (e-mail: mehran.shoushtari-
moghadam1@louisiana.edu).
M. Hassan Najafi is with Sch. Comp. and Info., Univ. of Louisiana at
Lafayette, 70503 Lafayette, LA, USA (e-mail: najafi@louisiana.edu).
Mohsen Imani is with Comp. Sci. and Eng., Univ. of California Irvine, 92697
Irvine, CA, USA, (e-mail: m.imani@uci.edu).

###### Abstract

Hyperdimensional computing (HDC) is an emerging computing paradigm that
imitates the brain’s structure to offer a powerful and efficient processing
and learning model. In HDC, the data are encoded with long vectors, called
hypervectors, typically with a length of $\mathbf{1}$K to $\mathbf{10}$K. The
literature provides several encoding techniques to generate orthogonal or
correlated hypervectors, depending on the intended application. The existing
surveys in the literature often focus on the overall aspects of HDC systems,
including system inputs, primary computations, and final outputs. However,
this study takes a more specific approach. It zeroes in on the HDC system
input and the generation of hypervectors, directly influencing the hypervector
encoding process. This survey brings together various methods for hypervector
generation from different studies and explores the limitations, challenges,
and potential benefits they entail. Through a comprehensive exploration of
this survey, readers will acquire a profound understanding of various encoding
types in HDC and gain insights into the intricate process of hypervector
generation for diverse applications.

###### Index Terms:

Hyperdimensional computing, hypervector generation, hypervector mapping,
signal encoding.

##  I Introduction

Hyperdimensional computing (HDC) is a burgeoning computing paradigm that has
recently surged in popularity. HDC emulates brain-like processing and finds
application in various cognitive tasks [1] from text analysis [2], to
recommendation systems [3], genome research [4], security issues [5] and
Internet of Things (IoT) applications [6], to name a few. HDC is a compelling
computing paradigm that has gained popularity for its unconventional approach
to data processing alongside other emerging computing paradigms such as
stochastic computing (SC), unary computing, approximate computing, and quantum
computing [7, 8]. In HDC, the (scalar) data are represented by encoding binary
(or bipolar) values into long hypervectors ($\boldsymbol{\mathcal{HV}}$s). In
other words, the encoding process maps the input data from the scalar domain
to a hyperspace. The $\boldsymbol{\mathcal{HV}}$s enable straightforward
processing through simple logic elements, thereby obviating the need for
complex circuit elements. Basic arithmetic operations, such as multiplication
and addition for binary $\boldsymbol{\mathcal{HV}}$s, are achieved using
logical XOR and counters. One significant advantage of processing data with
long $\boldsymbol{\mathcal{HV}}$s is the robustness they offer against soft
errors [9], thus addressing error-prone concepts such as bit significance
(most- and least-significant bits) and the sign bit in conventional binary
radix representation. The fault-robust property of HDC has particularly
demonstrated its advantage in emerging memory environments, including in-
memory computing (IMC), resistive RAM-based processing, and FinFET-based
architectures [10, 11]. The ability to endure in such advanced computing
setups underscores the HDC’s potential as a dependable computing solution.

TABLE I: Previous Survey Studies on HDC Year | Authors | Title
---|---|---
2023 |  | Ma
---
et al.[5]
| Robust Hyperdimensional Computing Against
---
Cyber Attacks and Hardware Errors: A Survey
2023 |  | Chang
---
et al.[12]
| Recent Progress and Development
---
of Hyperdimensional Computing
(HDC) for Edge Intelligence
2022 |  | Kleyko
---
et al.[13]
| A Survey on Hyperdimensional Computing
---
aka Vector SymbolicArchitectures,
Part II: Applications, Cognitive Models,
and Challenges
2022 |  | Kleyko
---
et al.[14]
| A Survey on Hyperdimensional Computing
---
aka Vector Symbolic Architectures,
Part I: Models and Data Transformations
2022 |  | Hassan
---
et al.[15]
| Hyper-Dimensional Computing Challenges
---
and Opportunities for AI Applications
2020 |  |  Lulu and
---
Parhi [16]
| Classification Using Hyperdimensional
---
Computing: A Review
2017 |  | Gritsenko
---
et al. [17]
| Neural Distributed Autoassociative
---
Memories: A Survey

The fundamental data units within HDC systems consist of vectors comprising
values of $+1$ (representing logic-$1$) and $-1$ (representing logic-$0$). To
encode data, $\boldsymbol{\mathcal{HV}}$s of up to $10,000$ bits in length
have been employed. Some recent endeavors focused on reducing the size of the
$\boldsymbol{\mathcal{HV}}$s ($D$) to enhance application accuracy. Longer
$\boldsymbol{\mathcal{HV}}$s yield more effectively embedded information.
Alongside determining the size ($D$), the encoding type is another pivotal
factor directly impacting accuracy. Typically, data are encoded into random
$\boldsymbol{\mathcal{HV}}$s that are orthogonal to each other. The concept of
orthogonality is crucial in HDC as it allows representing unique
features/symbols such as a letter in a text processing system, a pixel
position in an image in a cognitive task [18], or a time series in a voice
recognition task [19]. The phenomenon of orthogonality (or non-orthogonality
in certain cases) significantly influences $\boldsymbol{\mathcal{HV}}$
generation and, in turn, the accuracy of the system. Notably, randomly
generated vectors exhibit a degree of near orthogonality to each other [20].
Therefore, these randomly generated and pre-allocated vectors effectively
represent symbols in HDC systems, serving as atomic data primitives within the
application.

Various methods have been employed in the literature to achieve nearly-
orthogonal $\boldsymbol{\mathcal{HV}}$s. Among these, one prominent technique
involves initiating the process with an initial seed vector and subsequently
determining additional vectors through random bit-flip operations [21]. This
methodology yields correlated vectors for related scalars, while distant
scalars result in uncorrelated vectors. It is noteworthy that the specific
method of vector generation varies depending on the nature of the data under
consideration and the specific application context. For instance, in the
context of a language classification problem [2], vectors are generated using
a random approach to ensure that the symbols (specifically, letters)
constituting the language class are (near) orthogonal to each other.
Furthermore, to maintain orthogonality within each subset of sentences
referred to as $N$-grams, logical shifts are applied to the letter
$\boldsymbol{\mathcal{HV}}$s [2]. This procedure effectively preserves the
contextual relationships within the language, thereby facilitating the
language classification task.

Figure 1: A general overview of an HDC system targeting classification. (a)
From applications to learning and classifying steps: ⓐ Encoding the incoming
data. ⓑ Training using the whole bunch of input dataset, ⓒ Similarity check
between class-based $\boldsymbol{\mathcal{HV}}$s ($C_{class}$) and query
hypervector. Mainly, HDC systems target biomedical/biometrics applications,
image and text processing, and some sensor data processing, also considering
continuous signals like audio (VoiceHD [19]). Famous datasets used in HDC
prior works generally include (i) UCIHAR (Human Activity Recognition Using
Smartphones [22]) like [23], [24], THRIFTY [25], MulTa-HDC [26], [27], [28],
[29], (ii) ISOLET (Spoken Letters [30]) like [31], HDnn-PIM [32], tiny-HD [6],
(iii) PMAMP (Physical Activity Monitoring, [33]) like OpenHD [34], QuantHD
[35], HDTorch [36], (iv) FACE (Caltech256 dataset [37]) like AdaptHD [38],
[25], [34], (v) MNIST (Modified National Institute of Standards and Technology
database [39]) like [40], [41], [35], [42], [40], [43], [44], [45], (vi)
CARDIO (Cardiotocography [46]) like [25], Store-n-Learn [47], [48], (vii)
CIFAR (Canadian Institute For Advanced Research [49]) [42], [50], [51], [32],
[52]. Biomedical data processing applications lead the trend, and EEG
(electroencephalogram) [53, 54, 55], ECG (electrocardiogram) [56], iEEG
(intracranially recorded EEG signals) [57], EMG (Electromyography) [58], GSR
(Galvanic Skin Response) [59], and ECoG (electrocardiography) [54] are well-
known examples of HDC applications. The distribution of the
$\boldsymbol{\mathcal{HV}}$s is pseudo-random for orthogonality; if the
correlation is needed for closer numerical values of input data,
$\boldsymbol{\mathcal{HV}}$ mapping of two close values yields relatively
similar distributions. The operations here for binding are given as a general
operation. Literature has different binding examples: blockwise-circular
convolution [60], circular convolution [61], geometric product [62] and
component-wise modular addition [29, 63]. (b) The details of vector mapping;
raw data or extracted features can be used. The obtained
$\boldsymbol{\mathcal{HV}}$s are performed for the remaining encoding
operations, such as binding, bundling, and permutation. (c) The training
procedure can have a 1-data-1-pass conception or 1-data-multiple-pass to
retrain the model. Several works have neural network assistance [41, 64]. (d)
Similarity measurement is based on the well-known binary comparison metrics.

Our survey study fills a notable gap in the existing literature, namely the
absence of a survey specifically focused on the $\boldsymbol{\mathcal{HV}}$
generation and encoding aspect of HDC systems. While previous surveys and
benchmark studies have effectively presented the overall structure,
applications, and motivations of HDC (see Table I), this work delves into the
intricate process of $\boldsymbol{\mathcal{HV}}$ generation. A recent survey
by Chang et al. [12] reviewed HDC from the vantage point of edge intelligence
and cloud collaboration, encompassing discussions on security-privacy issues.
Within the realm of HDC research, Chang et al. [12] categorize the hardware
environment into three primary domains of microprocessor, FPGA, and computing-
in-memory (CIM). Although the listed studies on hardware comparisons of HDC
implementations contain some information on the encoding process, an explicit
emphasis on the crucial aspect of $\boldsymbol{\mathcal{HV}}$ generation is
necessary. Another recent two-part survey by Kleyko et al. [14, 13] offers a
highly comprehensive analysis. The first part of their survey [14] focuses on
exploring the opportunities for data transformation during
$\boldsymbol{\mathcal{HV}}$ encoding. The primary aim of this part is to equip
the readers with a foundational knowledge of basic notations, computational
models, and input transformations. They further provide an overview of the HDC
models with a specific emphasis on essential HDC operations, such as binding,
unbinding, and superposition. Lulu and Parhi [16], in their state-of-the-art
(SOTA) survey, define two main benchmark metrics for HDC: I) accuracy, and II)
efficiency. The accuracy depends on three factors: encoding, retraining, and
non-binary. They discuss encoding as one of the critical factors affecting
accuracy. Efficiency, on the other hand, is discussed under two categories:
algorithm and hardware. Three factors affect the algorithm: binarization,
quantization, and sparsity. Therefore, the first step for encoding,
$\boldsymbol{\mathcal{HV}}$ generation, affects accuracy and efficiency
depending on the vector distribution (sparse or dense). In addition to these
surveys and benchmarks, Kleyko et al. [14] highlight the studies in [65],
[66], and [67] as tutorial-like introductory articles on HDC.

Our study is centered on a concise and comprehensive survey with the primary
objective of elucidating the encoding process in HDC systems. Additionally, it
discusses the potent capabilities of conducting computations across the
vector-based paradigms such as HDC and SC at the $\boldsymbol{\mathcal{HV}}$
generation level. The structure of this study is as follows: Section II
provides a comprehensive overview of HDC systems and the relevant background
information. Section III delves into the intricacies of binary coding,
elucidating the functionalities of the Encoding Module in HDC. Section IV
consolidates HDC’s technical and hardware aspects, drawing upon application-
centric prior investigations and highlighting crucial encoding features.
Section V discusses the challenges, limitations, and potentials of the
encoding procedure in HDC systems, incorporating insights from diverse
research endeavors. Section VI further offers practical guidance to the reader
with a list of available platforms and a summary of SOTA works. Finally,
Section VII discusses the study’s conclusions and findings.

TABLE II: First Glance of Prior HDC Arts classified based on prominent
applications.

Key Topic |  SOTA Works
---|---
Biomedical/Biometrics |  [68], [64], [54], [20], [69], [56], [68], [35], [70], [71], [72], [73], [58], [74], [75], [59], [76], [77], [78], [79], [80], [81], [82], [83], [84], [47], [85], [48], [55], [57], [53], [86]
Image Process./Computer Vision |  [87], [1], [35], [70], [71], [51], [73], [88], [89], [41], [42], [90], [91], [92], [93], [94], [95], [96], [97], [83], [98], [44], [45], [32], [52], [99], [100]
Memory-centric Computing |  [101], [1], [102], [72], [103], [104], [11], [105], [32], [106], [107], [108], [109], [110], [111], [112], [113], [114], [115], [47], [116]
Security/Reliability Issues |  [117], [88], [5], [5], [114], [118], [119], [120], [121], [122], [123], [124], [125], [126]
Inter-computing Collab.❋ |  [102], [116], [127], [128], [50], [129], [130], [131], [132]
Language/Text Processing |  [10], [2], [133], [89], [134], [119], [93], [94], [95]
DNA Processing |  [135], [4], [136], [137], [138], [139]

❋: Inter-computing collaborations deal with exploiting Quantum Computing,
Neuromorphic Computing, Unary Computing, and Stochastic Computing under the
umbrella of the Emerging Computing paradigm in the context of Hyperdimensional
Computing. In Section IV, we further explain the importance of Stochastic
Computing on the HDC performance utilizing LD-sequences to generate high-
quality $\boldsymbol{\mathcal{HV}}$s.

##  II An Overview of HDC Systems

In this section, we provide the fundamental background for understanding HDC
systems. Firstly, we present an overview of the key sub-modules that
constitute HDC. Fig. 1 shows a general depiction of the HDC system, consisting
of three primary steps. The first step, denoted in Fig. 1 (a), is the Encoding
process. After mapping the input data (or features) to the atomic
$\boldsymbol{\mathcal{HV}}$s, the encoding stage performs some arithmetic
operations on the $\boldsymbol{\mathcal{HV}}$s. These operations are
categorized into Binding (Multiplication), Bundling (Accumulation) and
Permutation (Shift-Rotate). The second step, shown in Fig. 1 (b), corresponds
to the Training phase. In this step, all of the related
$\boldsymbol{\mathcal{HV}}$s from the same category are merged together to
create a unique class $\boldsymbol{\mathcal{HV}}$ to represent any unique data
class. Lastly, the third step, depicted as in Fig. 1 (c), involves Similarity
calculation. This phase deals with measuring the similarity (e.g. cosine,
hamming-distance, dot product, etc.) between the newly encoded hypervector as
the test input to the model with the class $\boldsymbol{\mathcal{HV}}$s. Thus,
at its core, the HDC framework establishes a general outline for creating a
learning model and classifying incoming data into their respective classes.

This survey study focuses on the encoding step in Fig. 1 (b) with detailed
insights targeting the initial vector mapping. Essentially, the initial stage
of encoding entails the embedding of available data into vectors, also known
as “mapping.” This process, referred to as $\boldsymbol{\mathcal{HV}}$
generation or projection, generates a vector based on a (pseudo-)random
source, resulting in a comprehensive representation of the data. While the
literature often labels this step as random $\boldsymbol{\mathcal{HV}}$
generation, our emphasis in Section IV lies on obtaining orthogonal vectors,
considering vector design qualities beyond mere pseudo-randomness by exploring
other high-quality distributions, such as low-discrepancy (LD) distribution
[140] with quasi-random sequences [141, 142] among others. The structure of
the resulting vector can change with the computation model; It may take on
binary forms (logic-1, logic-0) or bipolar representations (+1, -1). Moreover,
various structural variations in the vectors are possible, including sparse
and dense representations [14], as illustrated in Fig. 1 (b).

HDC offers remarkable efficiency, emerging as a promising alternative to
traditional machine learning (ML) models. HDC achieves this through four key
aspects: 1 streamlined arithmetic operations [102], 2 non-iterative learning
[143], 3 model tuning without optimization [47], and 4 compact model size
[129]. In contrast, conventional neural networks (NNs) rely on three
fundamental operations during the learning phase: (i) multiplication, (ii)
addition, and (iii) activation. Conversely, HDC’s model acquisition involves
the simple logical operations of (i) multiplication or binding using XORs;
(ii) addition or bundling utilizing population counters, and (iii)
binarization employing comparators ( 1). Binding and bundling are part of the
encoding phase, and permutation operations via shifting may be needed to
maintain consistent $\boldsymbol{\mathcal{HV}}$ orthogonality between
operations. The final model in HDC is attained solely through these
foundational steps, while conventional ML with NNs requires optimization
through operation-intensive partial derivations and model updates ( 2, 3). As
indicated in Fig. 1 (c), HDC uses single-pass learning optionally with a
simple retraining methodology [42]. Training data is evaluated once in most
approaches, and the holistic model is obtained. Some HDC examples may include
NN assistance to boost learning efficiency [64]. The HDC model consists of a
set of $\boldsymbol{\mathcal{HV}}$s, each representing a class vector for the
classification task. Unlike using positional weights in matrices connecting
numerous neurons across consecutive layers in NN systems, HDC uses $D$-sized
$\boldsymbol{\mathcal{HV}}$s for each class ( 4). When the training is
complete, the obtained model is checked with the testing data as in
conventional ML systems. The encoding in HDC is a global step that is also
applied to the testing data. For any class, the query data is encoded into a
$D$-sized hypervector. In the decision phase, the query vector is compared
with each $\boldsymbol{\mathcal{HV}}$ of a class already trained in the model.
Fig. 1 (d) shows different similarity measures used for checking the
similarity between query hypervector and the class
$\boldsymbol{\mathcal{HV}}$s.

The simplicity and efficiency of the HDC paradigm, along with its single-pass
training advantage have spurred its adoption in various applications. Table II
presents an overview of prior HDC studies across diverse domains.
Biomedical/Biometric, Image Processing, In-Memory Computation, Security, and
Language Processing have been the primary focus of HDC research. However,
there remains a relatively limited number of works exploring HDC applications
in the DNA domain, which presents an open research topic with significant
potential for further investigation.

##  III Hypervector ($\boldsymbol{\mathcal{HV}}$) Mapping

The core focus of most prior HDC studies centers on the overall encoding
procedure, which typically emphasizes vector arithmetic. However, from the
perspective of learning within the realm of data science, the initialization
of vectors holds a crucial aspect in shaping the overall model. In their SOTA
survey on HDC, Kleyko et al. acknowledge the existing research [144, 65, 145,
146, 147, 67] and underscore the lack of a survey work dedicated to
$\boldsymbol{\mathcal{HV}}$ for various types of data representations, such as
numeric, 2D image, sequence, and others [14]. Consequently, the investigation
of vector generation techniques tailored to specific data types has remained
relatively overshadowed by other aspects of HDC. Undoubtedly, the encoding
process using $\boldsymbol{\mathcal{HV}}$s constitutes a critical step that
profoundly impacts both the accuracy and efficiency of HDC. The dynamic
generation of $\boldsymbol{\mathcal{HV}}$s using an efficient hardware
architecture is critical both for overall hardware cost and on-edge learning
[92]. The overall effectiveness and learning performance of the HDC models
heavily relies on the quality of encoding the input data into
$\boldsymbol{\mathcal{HV}}$s [76]. Achieving accurate and efficient encoding
is vital to ensuring the reliable and high-performance operation of HDC in
various applications [12]. Kleyko et al. delve into the structure of the
$\boldsymbol{\mathcal{HV}}$s, such as dense, sparse, and binary. They discuss
the trade-offs involved in the selection of $\boldsymbol{\mathcal{HV}}$
density and some mapping characteristics [89]. Such insights shed light on
optimizing the encoding process and its impact on HDC performance and
applications.

Two well-known encoding methods commonly found in the literature are the
record-based and $N$-gram based approaches [68, 148, 58, 149]. For each input
feature $i$, the former employs position $\boldsymbol{\mathcal{HV}}$s denoted
as $\boldsymbol{\mathcal{P}_{i}}$, which exhibit orthogonality with respect to
each other, and level $\boldsymbol{\mathcal{HV}}$s denoted as
$\boldsymbol{\mathcal{L}_{i}}$, which demonstrate correlation for neighboring
pairs. The individual $\boldsymbol{\mathcal{HV}}$ of a specific class is
generated by the summation of the element-wise multiplication ($\oplus$:
logical XOR) between the position and level $\boldsymbol{\mathcal{HV}}$s for
each feature (or raw data element). The resulting single
$\boldsymbol{\mathcal{HV}}$ for the total number of features ($N$) is
represented as $\boldsymbol{\mathcal{H}}$, and is calculated as follows:

$\boldsymbol{\mathcal{H}}=\sum_{i=1}^{N}(\boldsymbol{\mathcal{L}_{i}}\oplus\boldsymbol{\mathcal{P}_{i}})$
(1)

The $N$-gram based method leverages the permutation operation ($\pi$) for each
level $\boldsymbol{\mathcal{HV}}$ ($\boldsymbol{\mathcal{L}_{i}}$). In this
approach, the resulting class $\boldsymbol{\mathcal{HV}}$ is generated by
element-wise multiplication (XORing) of the permuted level
$\boldsymbol{\mathcal{HV}}$s. The final $\boldsymbol{\mathcal{HV}}$ in this
case is represented as follows:

$\boldsymbol{\mathcal{H}}=\boldsymbol{\mathcal{L}_{1}}\oplus\pi\boldsymbol{\mathcal{L}_{2}}...\oplus\pi^{N-1}\boldsymbol{\mathcal{L}_{N}}$
(2)

In a similar manner, Salamat et al. [150] proposed a novel
$\boldsymbol{\mathcal{HV}}$ generation method for every feature vector $A_{i}$
containing N elements of the form $A_{i}=\\{a_{1},a_{2},...,a_{N}\\}$, where
each $a_{i}$ demonstrates a feature value $\boldsymbol{\mathfrak{F}_{i}}$ with
l levels as
$a_{i}\in(\boldsymbol{\mathfrak{F}_{1}},\boldsymbol{\mathfrak{F}_{2}},...,\boldsymbol{\mathfrak{F}_{l}})$.
In this case, the lowest feature value ($\boldsymbol{\mathfrak{F}_{1}}$) is
assigned a random $\boldsymbol{\mathcal{HV}}$ called
$\boldsymbol{\mathcal{H}_{1}}$ with size $D$ and the highest feature value
($\boldsymbol{\mathfrak{F}_{l}}$) is assigned a random
$\boldsymbol{\mathcal{HV}}$ called $\boldsymbol{\mathcal{H}_{\textit{l}}}$ by
randomly flipping $D/2$ bits. Starting from the first
$\boldsymbol{\mathcal{HV}}$ (corresponding to the lowest feature value), the
remaining $\boldsymbol{\mathcal{HV}}$s are generated by flipping
$\frac{D/2}{\textit{l}-1}$ bits at each step. Afterward, each feature value
$\boldsymbol{\mathfrak{F}_{i}}$ is mapped to its associated
$\boldsymbol{\mathcal{HV}}$ as $\boldsymbol{\mathcal{H}_{i}}$. In order to
take the position and/or temporal position of each input feature into account,
the permutation operation ($\pi$) is performed. The final
$\boldsymbol{\mathcal{HV}}$ denoted as $\boldsymbol{\mathcal{H}_{C}}$ is
generated by aggregating (bundling) the permuted $\boldsymbol{\mathcal{HV}}$s
as:

$\boldsymbol{\mathcal{H}_{C}}=\sum_{t=1}^{\mathcal{D}}\pi^{(t)}\boldsymbol{\mathcal{H}_{t}}$
(3)

The authors in [150] further proposed to perform permutation operation on each
segment of $\boldsymbol{\mathcal{S}}$ size instead of per bit permutation. The
advantage of this method is the utilization of fewer Blocked RAMs (BRAMs) in
FPGA. Accordingly, the work in [68] proposed a novel multi-encoder method to
take advantage of record-based and $N$-gram-based encoding methods, which
adaptively selects the proper encoding method according to the complexity of
the input data and reducing the dimension of the $\boldsymbol{\mathcal{HV}}$s
to increase the hardware efficiency in terms of power consumption and
execution time.

In vector mapping from scalars, Rachkovskij et al. [151] thoroughly discuss
the opportunities of sparse binary distributed encoding. They discuss
thermometric encoding, partially distributed flocet encoding, partially
distributed multiflocet encoding, distributed stochastic encoding,
subtractive-additive encoding, and encoding by concatenation.

For $\boldsymbol{\mathcal{HV}}$ manipulation, Schmuck et al. [152] discuss a
generic module that replaces costly memory storage with cheaper logical
operations to rematerialize seed $\boldsymbol{\mathcal{HV}}$s, facilitating
the construction of composite $\boldsymbol{\mathcal{HV}}$s without the need
for additional memory. They introduce an innovative approach for the majority
gate application, utilizing a $\boldsymbol{\mathcal{HV}}$ manipulator module
to perform approximate majority gating incrementally, enabling continuous
operation in the binary space for efficient on-chip learning. They perform a
design space exploration to showcase various functionally equivalent HDC
architectures, achieving substantial area and throughput improvements compared
to a baseline architecture. They implement the Pareto optimal HDC architecture
on Xilinx UltraScale FPGAs, utilizing only 18340 configurable logic blocks
(CLBs). This optimized architecture achieves impressive improvements, with a
2.39× reduction in area and a remarkable 986× increase in throughput when
compared to a baseline HDC architecture.

Symbolic representations, such as the letter processing example, require
orthogonal, i.e., dissimilar vectors. However, if the application involves
numerical data, then similarity or correlation between some data points is
required. For dissimilarity, random dense vectors with 50% of the binary
values with 1s are utilized for orthogonality. If the “1” and “0” vector
elements are roughly equiprobable, then the vector is called a dense vector.
For numerical data, closer values might need similar
$\boldsymbol{\mathcal{HV}}$ representations, and a sparse vector is a better
choice. If each $\boldsymbol{\mathcal{HV}}$ differs from the other by a few
bits, then the sparsity can be obtained in the vector representation [153,
154, 155].

Hersche et al. [156], and Cannings and Samworth [84] proposed random
projection methods using dense bipolar vectors (with $+1$s and $-1$s) for
encoding $\boldsymbol{\mathcal{HV}}$s. This encoding type may be inefficient
for hardware implementations because of massive addition/multiplication
operations. Instead of using random projection [157] with dense
$\boldsymbol{\mathcal{HV}}$s, utilizing sparse random projection would lead to
improving the efficiency by using $s\%$ (known as sparsity factor) of the
$\boldsymbol{\mathcal{HV}}$ elements to be generated randomly. Choosing the
proper sparsity factor can significantly reduce the number of arithmetic
operations. Further improvement could be achieved by preserving the benefit of
sparsity in random projection and omitting random access in generating
$\boldsymbol{\mathcal{HV}}$s as a hardware-friendly approach with predefined
non-zero indices of $\boldsymbol{\mathcal{HV}}$s[71, 87]. Random indexing was
proposed as a method of projecting data elements onto
$\boldsymbol{\mathcal{HV}}$ space for the text contexts [158, 2]. In this
method, each $\boldsymbol{\mathcal{HV}}$ is generated by a small fraction of
randomly distributed $+1$s and $-1$s and remaining elements of zeros (as a
sparse $\boldsymbol{\mathcal{HV}}$) for each element of data.

Basaklar et al. [76] proposed an optimized $\boldsymbol{\mathcal{HV}}$ design
with lower dimensionality compared to conventional high dimension HDC for
resource-restrained wearable IoT devices. They assumed a baseline HDC
structure with input features $F=\\{f_{1},f_{2},...,f_{N}\\}$ and $S$ training
samples. Each training sample $x_{s}$ in sample space $S$ is an $N$-tuple of
the form $x_{s}=\\{x_{s}^{1},x_{s}^{2},...,x_{s}^{N}\\}$ in which each
$x_{s}^{n}$ is the corresponding value of the feature $f_{n}$. To construct
the sample $\boldsymbol{\mathcal{HV}}$s, first, the level
$\boldsymbol{\mathcal{HV}}$s are generated by quantizing each feature value to
$M$ levels. The first level of the $f_{n}$ is assigned to a random bipolar
$D$-dimension $\boldsymbol{\mathcal{HV}}$ ($L_{n}^{1}$) and the other
consecutive level $\boldsymbol{\mathcal{HV}}$s ( $L_{n}^{m},\forall
m\in\\{1,...,M\\}$) are generated by randomly flipping $b=D/2(M-1)$ bits.
Finally, the sample $\boldsymbol{\mathcal{HV}}$ ($X_{s}$) is generated by
adding the associated level $\boldsymbol{\mathcal{HV}}$ assigned to the
related input feature as:

$X_{s}=\sum_{n=1}^{N}L_{n}^{m}\forall m\in\\{1,...,M\\}$ (4)

In a similar manner, the class $\boldsymbol{\mathcal{HV}}$s are generated by
combining sample $\boldsymbol{\mathcal{HV}}$s belonging to the same class. The
proposed method employs varying numbers of bit flips for each consecutive
level of $\boldsymbol{\mathcal{HV}}$s, treating the generation of
$\boldsymbol{\mathcal{HV}}$s as a multi-objective optimization problem. The
objectives are twofold: 1) maximizing the training accuracy, and 2) minimizing
the similarity between different classes. To achieve significant
dimensionality reduction in $\boldsymbol{\mathcal{HV}}$s, the approach
utilizes the 2D t-distributed Stochastic Neighbor Embedding (t-SNE) algorithm,
which is highly efficient in terms of hardware area and power consumption, for
nonlinearity reduction. In contrast to previous works that used record-based
encoding and N-gram-based encoding methods for $\boldsymbol{\mathcal{HV}}$s
[149], their method generates sample $\boldsymbol{\mathcal{HV}}$s by simply
adding the level $\boldsymbol{\mathcal{HV}}$s together.

Several non-linear encoding methods [159, 160] have been proposed in the
literature inspired from the Radial Basis Function (RBF) kernel trick. These
methods, introduced in various works such as Dual [105], FebHD [161], DistHD
[162], NeuralHD [163], RE-HFDC [28], and ManiHD [164], encode each dimension
of the data by calculating the dot product of the feature vector ($F$) with a
randomly generated vector ($B_{i}$) sampled from a Gaussian distribution with
mean $\mu=0$ and standard deviation $\sigma=1$, denoted as
$h_{i}=\cos{(B_{i}\cdot F)}$. The final encoded $\boldsymbol{\mathcal{HV}}$ is
binarized using a sign function. The same method has been employed in DistHD
and CyberHD [122] to identify and regenerate the insignificant dimensions,
resulting in reduced dimensionality in the $\boldsymbol{\mathcal{HV}}$s and
enhancing the overall system efficiency. In DistHD, the
$\boldsymbol{\mathcal{HV}}$s are generated based on the form
$h_{i}=\cos{(B_{i}\cdot F+c)}\times\sin{(B_{i}\cdot F)}$ with $c\sim
Uniform[0,2\pi]$.

The method proposed by Kleyko et al. [165] involves using a base random
$\boldsymbol{\mathcal{HV}}$ and performing multiple circular shifts in each
iteration to generate orthogonal $\boldsymbol{\mathcal{HV}}$s. In [89], two
types of encoding are employed for black-and-white images of letters and hand
gesture recognition from a sequence of electromyography (EMG) signals. In the
first encoding method (Dissimilar Distributed Encoding), each feature is
randomly assigned to a binary dense $\boldsymbol{\mathcal{HV}}$. Based on the
feature value being 0 or 1, the corresponding $\boldsymbol{\mathcal{HV}}$
undergoes a circular $0$-bit or $1$-bit shift, respectively. All of these
$\boldsymbol{\mathcal{HV}}$s will be orthogonal to each other, ensuring
distinctiveness. In the second encoding method (Distance-Preserving
Distributed Encoding), each feature is assigned to a
$\boldsymbol{\mathcal{HV}}$ with a random number of bit-flips. Unlike the
first method, the adjacent $\boldsymbol{\mathcal{HV}}$s exhibit similarities
to each other as their distance is preserved.

The SOTA research follows two general procedures for encoding 2D images: 1)
utilizing raw pixel values [166], and 2) leveraging ML techniques to extract
and utilize features [131, 69, 35]. The former approach results in lightweight
hardware design outputs but may suffer from lower accuracy. On the other hand,
the latter approach achieves higher accuracy but requires feature engineering
and requires hardware considerations for the feature extraction process. In
the context of pixel-based processing, the SOTA works explore two types of
information [16]: (i) pixel values, often referring to grayscale values, and
(ii) pixel positions. The first one involves generating level
$\boldsymbol{\mathcal{HV}}$s with numerical significance, while the second
requires orthogonal $\boldsymbol{\mathcal{HV}}$s to represent unique pixel
positions.

An intriguing method, fractional power encoding, is discussed in [14] for
encoding 2D images. This approach involves producing two randomly assigned
base $\boldsymbol{\mathcal{HV}}$s, denoted as $\boldsymbol{\mathcal{A}}$ and
$\boldsymbol{\mathcal{B}}$, for the $x$ and $y$ axes, respectively.
Subsequently, for each position $(u,v)$ in the image, the corresponding
$\boldsymbol{\mathcal{HV}}$ denoted as $\boldsymbol{\mathcal{W}}$ is computed
by raising the base $\boldsymbol{\mathcal{HV}}$ to the power of the respective
coordinate values (bound together). Thus, the expression for the resulting
$\boldsymbol{\mathcal{HV}}$ at position $(u,v)$ is as follows:

$\boldsymbol{\mathcal{W}}=\boldsymbol{\mathcal{A}}^{u}\oplus\boldsymbol{\mathcal{B}}^{v}$
(5)

TABLE III: Population of Previous studies considering the Encoding format and
$\boldsymbol{\mathcal{HV}}$ source.

Previous Studies | Binding | Bundling | Perm1. |  | RBF2
---
| RP3
---
| CA4
---
| tanh
---
| CC5
---
| SC6
---
| ScC7
---
DFT8 | KP9 |  | SKC10
---
RAFE11
FQ12 | EELP13 |  | $\boldsymbol{\mathcal{HV}}$
---
Source✠
|  VoiceHD [19],
---
AdaptHD [38],
PRID [167], MIMHD [104],
SemiHD [168], BinHD [73],
QubitHD [127], QuantHD [35],
HDCluster [21],
HDC-IM [116], EnHDC [169],
AdaptHD [38], TP-HDC [170],
LeHDC [41], XCelHD [171],
MulTa-HDC [26],
HyperRec [3],
ScaleHD [9],
HyperSpec [86],
Imani et al. [24],
Nazemi et al. [64],
Montone et al. [94]
✔ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
|  ST-HDC [106], RelHD [172],
---
LookHD [173], GENERIC [92],
BioHD [137], GrapHD [1],
SHDC [174], HAM [175],
Rahimi et al. [2],
Datta et al. [148],
Li et al. [11], Wu et al. [176],
Karunaratne et al.[103],
Rahimi et al.[146, 55],
Kovalev et.al [93]
✔ | ✔ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
|  FebHD [161], DistHD [162],
---
DUAL [105], NeuralHD [163],
RE-FHDC [28], ManiHD [164],
CascadeHD [177],
SupportHD [178],
TempHD [179],
Yu et al. [29]
✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Gaussian
|  SparseHD [180],
---
F5-HD [150], compHD [181],
HD-Core [182], HoloGN [165],
Kleyko et al. [183], [89]
✘ | ✔ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
|  SecureHD [184],
---
OnlineHD [143],
SHEARer [166],
FACH [185], SearcHD [72]
✔ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Gaussian
|  PULP-HD [186], MHD [68],
---
PerfHD [100],
Schmuck et al. [152],
Rahimi et al. [58], [54],
Moin et al. [82]
| ✔
---
✔✔✻
✔ | ✔✔✻ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
|  ReHD [87], BRIC [71],
---
HyperSpike [187],
HDnn-PIM [32], HyDREA [101],
FHDnn [188], FedHD [90],
Prive-HD [124],
THRIFTY [25],
Gupta et al. [47],
Morris et al. [189]
✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
|  Laelaps [69],
---
Burrello et al. [75], [74]
✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | LBP14
|  GenieHD [135],
---
Mitrokhin et al. [190],
Rahimi et al. [10]
✔ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
| Menon et al.
---
[191], [59]
✘ | ✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
HDNA [4] | ✔ |  | ✔
---
✔✔✻
✔✔✻ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
| Rosato et al.
---
[192]
✔ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ |  | TM15
---
Code
| Mitrokhin et al.
---
[51]
✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ |  | DH16
---
| Burrello et al.
---
[81]
✔ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | LBP
| tiny-HD
---
[6]
✘ | ✘ | ✔ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
| Basaklar et al.
---
[76]
✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
| Hersche et al.
---
[84]
✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✔ | ✔ | Gaussian
| Sutor et al.
---
[52]
✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | NN output
| Aygun et al.
---
[129]
✔ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | LD-Seq.
| Moghadam et al.
---
[50]
✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | LD-Seq.
| Chang et al.
---
[56]
✔ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Non-linear
| HDCP
---
[193]
✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
| StocHD
---
[102]
✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | Random
| Rasanen
---
[133]
✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | ✘ | Non-linear
| Kirilenco et al.
---
[95]
✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | ✘ | Gaussian
| Xu et al.
---
[194]
✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | ✘ | Random
| Hersche et al.
---
[97]
✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✘ | ✔ | ✘ | ✘ | Gaussian

1:Permutation, 2: Radial Basis Function 3:Random Projection, 4:Cellular
Automaton, 5:Circular Convolution, 6:Stochastic Computation, 7:Scatter Code,
8:Discrete Fourier Transform, 9:Kronecker Product, 10:Selective Kanerva Coding
[195], 11: Randomized Activation Functions Encoding, 12:Feature Quantization,
13:End-to-End Learned Projection, 14: Local Binary Pattern [196],
15:Thermometer Code, 16:DeepHash [197, 198, 199, 200, 201].
✻:The rows with ✔✔ mean the two-stage encoding approach. For instance the 6th
row represents the methods incorporate Binding and Bundling operations at the
first step and the Binding and Permutation operations at the second step.
✠:The $\boldsymbol{\mathcal{HV}}$ source emphasizes the inherent process of
generating the $\boldsymbol{\mathcal{HV}}$.

Table III presents a comprehensive overview of prior works, showcasing various
$\boldsymbol{\mathcal{HV}}$ mapping and encoding styles and the sources used
for $\boldsymbol{\mathcal{HV}}$ generation. The majority of the prior
approaches adopt random source functions, such as the rand function in MATLAB
or Python, to generate $\boldsymbol{\mathcal{HV}}$s. However, certain prior
works, specifically [129] and [50], explore the use of LD-sequences as the
source for $\boldsymbol{\mathcal{HV}}$ generation. These works demonstrate
significantly higher accuracy for HDC language processing [129] and HDC image
classification [50]. The higher accuracy is attributed to the inherent
determinism and enhanced orthogonality by employing LD-sequences compared to
random-based $\boldsymbol{\mathcal{HV}}$ generation methods.

##  IV New Perspectives on Hypervector Mapping

This section explores some novel opportunities for HDC encoding. Specifically,
it addresses the pseudo-random nature of pre-allocated or dynamically
generated $\boldsymbol{\mathcal{HV}}$s, which requires identifying the best-
performing hypervectors through multiple iterations. To investigate this, we
employ a language classification problem [129] as a reference and make a
pertinent observation concerning the random procedure. In the context of the
language classification problem, the SOTA accuracy [2] achieved on the
Europarl Parallel Corpus dataset [202] is reported as 97.1%. This performance
is attained using $D$=10,000 and N=4-gram parameters, with the
$\boldsymbol{\mathcal{HV}}$s being randomly assigned. However, an intriguing
discovery is made when employing quasi-random numbers, such as Sobol Sequences
[203, 140, 204] for vector generation. These sequences previously showed
significant accuracy improvements for SC systems [142]. By utilizing only one
iteration of vector generation without resorting to any best candidate
iterative selection, the accuracy increases by 0.2%. However, upon decreasing
$D$ to 256, a significant disparity in average accuracy emerges between the
pseudo-random approach, yielding 69.24%, and the LD-based quasi-random vector
generation, achieving an impressive 79.03% classification rate. This
compelling result underscores the potential of LD-based quasi-random vector
generation as a promising technique for enhancing vector mapping in HDC
encoding. Building on these findings, there arises an exciting opportunity to
leverage SC [205] and its deterministic processing avenue [142, 206]. By
incorporating SC principles into the HDC vector generation process, we can
further improve the accuracy of HDC encoding.

###  IV-A Inter-computing Processing: Revisiting a Sister Computing Paradigm,
Stochastic Computing

SC has gained attention in recent years due to its intriguing advantages,
including robustness to noise, high parallelism, and power efficiency [207,
205]. SC realizes complex arithmetic operations using simple logic gates,
leading to significant cost savings in various applications such as image
processing [208], sorting [209], and ML [210, 211]. In addition to surveying
previous HDC research and underscoring the $\boldsymbol{\mathcal{HV}}$ mapping
side, in this section, we discuss a new perspective towards new hypervector
generation opportunities. We learn from the recent advancements of SC for
generating high-quality correlated/uncorrelated bit-streams in generating HDC
hypervectors. Table IV compares conventional computing (CC), SC, and HDC
paradigms. CC involves positional binary radix representation and the concept
of significant bits. SC and HDC enjoy holographic representations of binary
data with no significant digits. The atomic data in SC are bit-streams, while
they are $\boldsymbol{\mathcal{HV}}$s in HDC.

TABLE IV: Comparison of Different Computing Paradigms:
Conventional Binary Computing, Stochastic Computing, and Hyperdimensional Computing. Computing Paradigm | Conventional Computing (CC) | Stochastic Computing (SC) | Hyperdimensional Computing (HDC)
---|---|---|---
Data Type | Bit | Bit-stream | Hypervector
Data Representation | Binary radix (most-, least-significant) |  | Unipolar, Bipolar, Likelihood
---
Ratio, Inverted Bipolar
| Binary, Bipolar,
---
Sparse, Dense
Initial Encoding | No |  |  Pseudo- or Quasi-random bit-streams
---
| (Orthogonal) hypervectors
---
Encoding | 2n Bit Significant Encoding | Logical Comparison | Logical Multiply-Permute-Add
Storage | Memory | Memory | Item memory, Associative memory
ML Training | Weights | Weight Bit-streams | Class Hypervectors
Testing |  | Pre-trained classifier
---
in binary format
| Pre-trained classifier
---
in bit-stream format
| Pre-trained class hypervectors
---
in hypervector format
Model Complexity | High | Low | Low
Feature Extraction | Easy | Moderate | Difficult

In HDC, the initial step is $\boldsymbol{\mathcal{HV}}$ mapping. There is no
initial value generation in CC. Bit-stream or $\boldsymbol{\mathcal{HV}}$
assignment is an important step for SC and HDC. In SC, this assignment depends
on logical comparison [142]. The encoding of any scalar value involves
comparing the data value with some random numbers. For a bit-stream of length
N, the input scalar ($X$) is compared with N random numbers ($R$). A ‘1’ is
produced when $X>R$. A ‘0’ is produced, otherwise. In
$\boldsymbol{\mathcal{HV}}$ generation, the initial encoding can be performed
similarly for dense representation. In this respect, SC and HDC coincide. This
method was used mainly when coding non-numeric symbols with orthogonal
$\boldsymbol{\mathcal{HV}}$s [2]. In HDC, the scalar value of $X$ is a
threshold value of $0.5$ for all symbols (not to make a bias between 0 and 1
probability), and random $\boldsymbol{\mathcal{HV}}$s are generated for
different symbols (such as letters of an alphabet). The encoding step for HDC
continues with multiply-add-permute operations; depending on the application,
the steps may vary. In general, SC has a simpler and constant encoding
procedure as it does not attribute holistic meaning to its bit-streams.

Compared to SC and CC, HDC has two concepts for storing data: item memory and
associative memory. There is no different storage concept for CC and SC. In
the scope of ML, the learning step is based on training the weights for CC.
Here the weights can be a function parameter, polynomial coefficients, or NN
coefficients. The resulting model is expressed in means of bit-streams in SC
while stored as class $\boldsymbol{\mathcal{HV}}$s in HDC. Class
$\boldsymbol{\mathcal{HV}}$s are cumulatively produced specifically for each
class. Testing a model is based on the similarity comparison of the class
$\boldsymbol{\mathcal{HV}}$s and the test $\boldsymbol{\mathcal{HV}}$ in HDC.
SC, on the other hand, can be thought of a paradigm where a similar structure
in CC is expressed in the bit-stream domain only; SC offers an efficient
solution in terms of hardware addressing the high complexity of CC designs
(complex multipliers, full adders, etc.).

Although HDC has low model complexity, it is challenging in terms of accuracy
and feature extraction. On the other hand, CC offers a high-accuracy model due
to its precise representation. Considering the complexity, accuracy, and
feature properties, SC lies between CC and HDC. In SC, the data is not vector
symbolic; it is obtained by expressing scalar values directly with bit-
streams. Categorical or symbolic data processing has not yet been a topic of
SC (and it has a high potential for future work). The only issue is the built-
in quantization property since SC is a discrete representation. Finally, SC
and HDC provide a high fault tolerance [212], while CC is vulnerable to non-
ideal hardware hazards and soft errors (i.e., bit flips).

###  IV-B Is Pseudo-randomization Really Needed?

In this section, we benchmark some important random sequences such as Sobol
[142], Weyl (W) [213], R2 (R) [214], Kasami (K) [215], Latin Hypercube (L)
[216], Gold Code (G) [217], Hadamard (HD) [218], Faure (F) [219], Hammersly
(HM) [220], Zadoff–Chu (Z) [221], Niederreiter (N) [222, 223], Poisson Disk
(P) [224], and Van der Corput (VDC) [225] by answering the question “Is
pseudo-randomness can be replaced by quasi-randomness in HDC encoding?”. The
binary-valued sequences (logic-1 and logic-0), such as Kasami, Gold Code, and
Hadamard, represent good orthogonality in terms of cosine similarity. The
others involve the LD (quasi-random) property, which is defined as the measure
of deviation from the uniformity [140]. The level of dynamicity varies
depending on whether the same sequence is generated in each attempt of a
generation process. Sequences such as Kasami, Latin Hypercube, Zhadoff-Chu,
and Poisson Disk exhibit dynamic behavior due to their pseudo-random
properties. Fig. 2 displays several non-binary valued sequences, which include
fixed- or floating-point numbers, along with their corresponding scattering
plots. Each plot depicts two distinct sequences derived from each random
number sequence listed above. We target $\boldsymbol{\mathcal{HV}}$ generation
by using these random number sources.

The Weyl sequence is classified as an additive recurrence sequence, known for
its generation through the iteration of multiples of an irrational number
modulo 1. Specifically, when considering $\beta\in\mathbb{R}$ as an irrational
number and $b_{i}\in\\{0,\beta,2\beta,...,k\beta\\}$, the sequence
$b_{i}-\lfloor b_{i}\rfloor$ ($b_{i}$ modulo $1$) produces an equidistributed
sequence within the interval (0, 1). Another example of an additive recurrence
sequence is the R sequence, which is based on the Plastic Constant, a unique
real solution of a cubic equation [226, 214]. In the case of Latin Hypercube
sequences, the sampling space is divided into equally sized intervals, and a
point within each interval is randomly selected [227].

The VDC sequence serves as the fundamental basis for many LD sequences. It is
generated by reversing the digits of the corresponding base number and
representing each integer value as a fraction within the interval $[0,1)$. For
example, the decimal value $209$ in base-7 is represented with $(416)_{7}$,
and the corresponding value for the base-7 VDC sequence is $6\times
7^{-1}+1\times 7^{-2}+4\times 7^{-3}=\frac{305}{343}$. Similarly, the Faure,
Hammersley, and Halton sequences are derived from the concept of VDC using
prime or co-prime numbers. To generate the Faure sequence in $r$-dimensions,
the smallest prime number $\omega$ is chosen such that $\omega\geq r$. The
first dimension of the Faure sequence corresponds to the VDC sequence with
base-$\omega$, while the remaining dimensions involve permutations of the
first dimension. The $q$-dimensional Halton sequence is generated by utilizing
the VDC sequence with different prime bases, starting from the first prime
number to the $q$-th prime number. However, a limitation of the Halton
sequence is the significant increase in the number of cycles required to
adequately fill the $q$-dimensional hypercube in high dimensions [228]. The
first Sobol sequence is based on the base-2 VDC sequence, while other Sobol
sequences are generated through permutations of specific sets of direction
vectors [229, 204]. The Niederreiter sequence is another variant of the VDC
sequence that relies on the powers of prime numbers. This sequence
incorporates irreducible and primitive polynomials to ensure LD and uniformity
across the sample space [230]. The Poisson Disk sequence is a special kind of
sampling method that generates evenly distributed samples with minimal
distances between the points.

Figure 2: The scatter plots of various sequences illustrate the distribution
of each sequence in a 2D sample space consisting of 1024 points. The
irrational numbers utilized for the Weyl sequence were $\pi$ and the Silver
Ratio($\sqrt{2}-1$). The R2 sequence was generated using the Plastic Constant.
For the Faure sequence, base-7 was employed. In the case of the Sobol
sequence, the first two sequences from MATLAB’s implementation of Sobol were
utilized. The Halton sequence employed MATLAB’s Halton implementation with
bases 11 and 13. Bases 2 and 3 were utilized for the Hammersley sequence. The
Zadoff-Chu sequence with a length of 1024 was created using MATLAB. Bases 2
and 1024 were used for the VDC sequence. The first two sequences of the
Niederreiter sequence closely resembled the structure of the Sobol sequence,
with permutations within the elements. The Poisson Disk sequence employed the
minimal distances approach between points. Lastly, the Random sequence was
generated using MATLAB’s built-in rand() function.

In order to evaluate the impact of LD sequences on the performance of HDC, we
conducted a series of experiments involving image classification utilizing the
widely-used MNIST dataset [39]. The encoding process considered both the pixel
values for level $\boldsymbol{\mathcal{HV}}$s and the pixel coordinates for
position $\boldsymbol{\mathcal{HV}}$s. Notably, each vector mapping was
executed using a quasi-random LD sequence. For level
$\boldsymbol{\mathcal{HV}}$, the mapping was established based on a comparison
between the sequence value and the corresponding numeric pixel value, allowing
for the correlation of values in close proximity. On the other hand, for
position $\boldsymbol{\mathcal{HV}}$, the mapping was determined through the
comparison between a constant threshold $Th$=$0.5$ and the sequence elements,
thus ensuring orthogonality. Through this approach, we introduced a new and
innovative method for 2D image encoding, showcasing the potential benefits of
LD-sequences in HDC applications [50]. In Table V, we present the accuracy
comparison for three distinct dimensions of $D$=1K, 2K, and 8K. The final row
in Table V highlights the utilization of random sequences (like in prior art)
for generating the $\boldsymbol{\mathcal{HV}}$s, with the average
classification accuracy reported over 100 iterations.

The performance evaluation of the HDC architecture was conducted not only in
terms of accuracy but also within the context of a NN-assisted system. For
this purpose, a widely used convolutional neural network (CNN) architecture
was initially employed, where HDC served as the classifier, and its accuracy
performance was scrutinized. Additionally, in our prior work in [50], we took
into account the potential accuracy challenges of HDC when applied to the
CIFAR-10 dataset [49] without convolutional features, as highlighted by Dutta
[32]. Table VI presents a comprehensive survey of the CIFAR-10 HDC system
accuracy in previous works. The performance evaluation encompassed self-HDC
(HDC as a standalone classifier), HDC integrated with CNN, and HDC aided by
transfer learning, specifically utilizing the VGG11 architecture pre-trained
on the ImageNet dataset. Remarkably, the proposed 2D image encoding scheme
[50] exhibited improved accuracy performance for plain HDC, surpassing other
SOTA designs in Table VI. Furthermore, the analysis conducted with CNN and
transfer learning demonstrated enhanced accuracy performance compared to
existing SOTA approaches. Additionally, the utilization of a combination of
two different LD-sequences (such as Sobol+VDC), instead of one unique random
source during vector mapping, has been harnessed to generate the
$\boldsymbol{\mathcal{HV}}$s, resulting in an improvement in the overall
accuracy compared to the SOTA methods.

For the hardware efficiency, Table VII further compares the hardware cost of
generating two $\boldsymbol{\mathcal{HV}}$s of length $D=256$. The comparison
is performed for the Sobol, Halton and VDC sequences. The VDC sequence
generator design utilizes a straightforward $log_{2}D$-bit counter to generate
sequence values for a specific base of $D$, assuming $D$ is a power of 2. This
design offers the advantage of simplicity and lightweight implementation,
resulting in approximately $3.5\times$ and $9.58\times$ greater area
efficiency compared to the Halton sequence generator and Sobol-based design,
respectively. Moreover, in terms of power consumption, the VDC design
demonstrates approximately $3.14\times$ and $1.53\times$ higher efficiency
compared to the Halton and Sobol sequence designs, respectively. These
findings highlight the favorable hardware characteristics of the VDC sequence
generator, making it an attractive choice for $\boldsymbol{\mathcal{HV}}$
generation in practical implementations.

TABLE V: Accuracy(%) comparison of MNIST dataset for various Low-Discrepancy
sequences with different $D$ size.

LD-Seq. | $D$=1K |  $D$=2K |  $D$=8K
---|---|---|---
Sobol | 85.13 | 86.37 | 87.28
Halton | 53.45 | 66.44 | 82.65
| Latin Hypercube
---
85.05 | 86.47 | 86.79
Niederreiter | 76.08 | 77.64 | 77.70
Hammersley | 53.44 | 66.77 | 82.87
Hadamard | 83.68 | 83.95 | 84.19
Gold Code | 78.52 | 78.84 | 78.94
Kasami | 79.66 | 70.59 | 84.62
R2 | 85.73 | 85.98 | 87.18
Faure | 61.51 | 77.45 | 85.77
Random | 79.09 | 81.29 | 87.27

The evaluation for the Random case involved conducting 100 iterations, and the
average classification accuracy was derived. LD-based
$\boldsymbol{\mathcal{HV}}$ generation only needs 1 iteration.

TABLE VI: Accuracy comparison for CIFAR-10: SOTA HDCs vs. [50].

Method |  | Acc.
---
(%)
Retrain |  | NN
---
Assist.
SearHD ($10K$) [72] [41] [43] | 22.66 | No | No
BRIC ($4K$) [71] [32] | 26.90 | Yes | No
QuantHD ($8K$) [35] [41] [43] | 28.42 | Yes | No
LeHDC ($10K$) (BNN) [41] | 46.10 | Yes | Yes
Efficient HD ($32$) (BNN) [43] | 46.18 | Yes | Yes
GlueHD ($8K$) (Multiple NNs-MNNs) [52] | 66.20 | Yes | Yes
GlueHD ($8K$) (VGG11 + MNNs) [52] | 90.80 | Yes | Yes
Baseline HDC ($10K$) [41] | 29.50 | No | No
✽Work in [50] with ($8K$) (Sobol \+ VDC) | 42.72 | No | No
✽Work in [50] with ($8K$) (Halton \+ VDC) | 34.72 | No | No
❊Work in [50] with ($8K$) (Sobol) (CNN†) | 53.62 | No | Yes
❊Work in [50] with ($8K$) (Halton) (CNN†) | 52.94 | No | Yes
✡Work in [50] with ($8K$) (Sobol) (VGG11) | 90.97 | Yes | Yes

✽: plain-HDC, ❊: CNN† feature extraction assistance, ✡: VGG-11 as a pre-
trained model for transfer learning. †CNN uses three convolutional layers.

##  V From Challenges and Limitations
to Promises and Recommendations

In this section, we discuss the future prospects of HDC with a focus on the
vector encoding step as the central theme of this survey. By examining
previous works, we can gauge the potential promises and challenges associated
with this emerging paradigm. The widespread adoption of HDC architectures in
the next-generation of computing systems seems inevitable, with potential
applications in (i) in-memory computing, (ii) flexible-printed electronics
[231], (iii) quantum computing [62], and (iv) in-storage computing [47].
Notably, there already exist SOTA approaches for in-memory computing platforms
[101, 1, 102, 72, 103, 104, 11, 105, 32, 106, 107, 108, 109, 110, 111, 112,
113, 114, 115, 47, 116], where the fundamental operations of HDC can be easily
implemented within the memory. However, one of the major challenges lies in
generating high-quality $\boldsymbol{\mathcal{HV}}$s while addressing the
orthogonality and correlation issues.

Karunaratne et al. [103] discuss the possibility of implementing a complete
HDC system on an in-memory computing (IMC) platform. They explore an N-gram-
based encoding approach and similarity calculation through associative memory
search, which operate exclusively in memory. On the other hand, Liu et al.
propose an adapted method for Resistive Random-Access Memory (RRAM) devices
for IMC in the HDC-IM framework [116]. In this framework, they propose some
memory-based steps, such as bit-flipping, replication, shifting, and
catenation, to generate item memory and continuous item memory, thereby
offering a novel approach for handling the vector generation process in
memory. However, future efforts related to in-memory
$\boldsymbol{\mathcal{HV}}$ generation should also take into account the cost
of each step, including shifting and catenation. Additionally, it is essential
to numerically measure the degree of orthogonality after these steps to ensure
the quality of orthogonal $\boldsymbol{\mathcal{HV}}$s achieved, thus
presenting a new challenge for further research.

TABLE VII: Hardware Cost of two Hypervector
Generations with $D$ = 256 [50].

Seq. |  | Area
---
($\mu m^{2}$)
| Power
---
($\mu W$)
| Latency
---
(ns)
Sobol | $1562$ | $24.64$ | $0.68$
Halton | $580$ | $50.45$ | $1.06$
VDC | $163$ | $16.05$ | $0.49$

The synthesized results were reported based on the Synopsys Design Compiler
v2018.06 and the 45nm FreePDK gate library. The 2nd and 3rd sequences of the
Sobol and base-2 and base-3 of the Halton sequence were used. For the VDC
sequence case, any powers of 2-bases (e.g. 2,4,8,16,…) can be used.

Speaking of bit-flipping, Basaklar et al. [76] discuss
$\boldsymbol{\mathcal{HV}}$ design for edge devices in a broader context. They
define a problem solution space for improving $\boldsymbol{\mathcal{HV}}$
design using a genetic algorithm. The $D$-dimensional level
$\boldsymbol{\mathcal{HV}}$s are represented using a quantized input space,
and at each level, random bit-flipping ($+1$ $\leftrightarrow$ $-1$) is
applied to vector positions. The number of bit-flips at each level is treated
as an optimization problem and solved using an evolutionary heuristic search
approach. Nevertheless, it is crucial to acknowledge an important aspect
overlooked in most prior-art works regarding $\boldsymbol{\mathcal{HV}}$
generation, which is the need for lightweight $\boldsymbol{\mathcal{HV}}$
designs. Particularly for IMC technologies, the limited operations might
impact even polynomially-hard solutions for finding the best-performing
$\boldsymbol{\mathcal{HV}}$s. Thus, for the upcoming era of HDC research,
emphasis should be placed on exploring on-device dynamic vector generation
approaches that are lightweight and hardware-friendly.

Another promising avenue for future HDC research lies in custom processor
design. Datta et al. [148] have taken the first step by proposing a 28nm
Application-Specific Integrated Circuit (ASIC) processor architecture. This
generic HD processor integrates multichannel sensor inputs and a
$\boldsymbol{\mathcal{HV}}$ mapper, which facilitates vector generation into
item and associative memory. The encoder is responsible for executing the
necessary learning-based operations. However, to fully capitalize on the
potential of HDC, there is a scope for exploring custom processor designs
tailored to specific computer architectures. This could entail designing novel
mnemonic codes, instructions, and customized data-flow to accommodate emerging
HDC requirements. Particularly, for lightweight wearable sensing of biomedical
data and classification tasks, a custom processor optimized for HDC could
prove highly valuable. Notably, HDC has already demonstrated its effectiveness
in various biomedical applications [69, 58, 59, 191]. In light of this, the
development of specialized processors designed explicitly for HDC could lead
to significant advancements in the field, enabling efficient and seamless
integration of HDC-based solutions into wearable biomedical devices.

Another significant research direction with the potential to yield fruitful
results is the exploration of the analogy between HDC systems and NNs. Ma and
Jiao [42] have already provided valuable insights into this comparison by
discussing the two learning strategies in a comparative manner. Notably, they
highlight the effectiveness of NN-assisted HDC, which suggests that the
generation of $\boldsymbol{\mathcal{HV}}$s can be effectively managed using NN
approaches. As a future prospect, researchers could investigate the
possibility of replacing custom distributions with lightweight artificial
intelligence methods for generating concise and efficient
$\boldsymbol{\mathcal{HV}}$s mapped to memory. Such an approach has the
potential to become a prospective SOTA method. Duan et al. [41] have
previously proclaimed HDC as a single-layer binarized neural network (BNN)
architecture. They also discuss the limitations of the current HDC training
trend. Two fundamental limitations are identified: (i) retraining in HDC
differs from conventional NNs, as it only updates the misclassified class,
leaving the true classes’ $\boldsymbol{\mathcal{HV}}$s unchanged. (ii) the
retraining process in HDC is limited to a fixed step size when updating the
class $\boldsymbol{\mathcal{HV}}$. Duan et al. point out that the derivative
of loss, which is considered in conventional NNs, is overlooked in the HDC
training system. Consequently, future studies could capitalize on this finding
by integrating NNs and HDC, effectively merging their principles into a
unified approach. By leveraging the strengths of both HDC and NNs, researchers
can potentially address the identified limitations and create a hybrid
paradigm that offers enhanced learning capabilities and more efficient
$\boldsymbol{\mathcal{HV}}$ generation techniques. This integration of HDC and
NNs holds the promise of advancing the current SOTA in ML and memory-based
computing, leading to novel applications and breakthroughs in various fields.

As we approach the conclusion of this survey, it is crucial to bring attention
to a significant challenge that has been overlooked in the literature: the
dynamic generation of $\boldsymbol{\mathcal{HV}}$s during the encoding
procedure in HDC systems. Most existing studies in HDC either rely on
producing a seed vector and generating the remaining
$\boldsymbol{\mathcal{HV}}$s with a bit-flip technique [20], or they retrieve
different randomly generated orthogonal vectors from memory units, such as
look-up tables [173]. However, this raises an important issue: In scenarios
involving online learning, where new data arrives continuously, a separate
vector set is required for each new data instance. The dynamic generation of
these new vector sequences becomes a key concern. In this regard, seeking
support from other emerging computing technologies, such as SC may offer a
promising research direction for HDC, fostering inter-computing collaboration
between these emerging paradigms.

A recent study by Thomas et al. [232] addresses this dynamicity issue with an
innovative hashing solution ([233]) for on-the-fly ([191]) vector generation,
also known as streaming encoding. By revisiting and exploring inter-computing
solutions, SC can serve as a valuable tool for streaming encoding,
particularly due to its hardware-efficient nature. In SC, the hardware
structure for bit-stream generation utilizes a simple generator comprising a
linear-feedback shift register (LFSR) and a comparator [234]. This enables the
production of correlated or uncorrelated sequences using the same or different
LFSR modules, respectively, with ease [235]. It is worth noting that Chang et
al. [170] have touched upon the possible utilization of a hardware-friendly
LFSR approach in HDC systems. Nevertheless, further research is required in
this domain, particularly exploring the potential of LD-sequences, as
discussed in Section IV-B. In summary, the dynamic generation of
$\boldsymbol{\mathcal{HV}}$s during the encoding process presents a critical
challenge for HDC systems, especially in scenarios involving online learning.

To sum up, we highly recommend the following future efforts as new research
opportunities in the frame of HDC:
$\Circled[fillcolor=black,innercolor=white,]{\mathsf{1}}$ streaming encoding
and dynamic vector mapping for edge devices,
$\Circled[fillcolor=black,innercolor=white,]{\mathsf{2}}$ study on biomedical
applications of HDC frameworks (considering the populations of prior works
reported in Table II),
$\Circled[fillcolor=black,innercolor=white,]{\mathsf{3}}$ new research efforts
on the security and reliability side of the HDC systems (as Ma et al. [5]
discuss), $\Circled[fillcolor=black,innercolor=white,]{\mathsf{4}}$ similar to
what we underscore in this work for SC, a high potential for collaborations
between HDC and other emerging paradigms (such as neuromorphic computing), and
$\Circled[fillcolor=black,innercolor=white,]{\mathsf{5}}$ new HDC efforts for
video processing.

TABLE VIII: Prior arts on HDC implementation with different platforms.

Project |  | Implementation
---
(language percentage)
| Encoding
---
Details
| TorchHD
---
[236]
| Python
---
(100%)
| random, level,
---
thermometer,
and circular
$\boldsymbol{\mathcal{HV}}$ encoding
| DistHD
---
[162]
| Python
---
(100%)
| Gaussian,
---
RBF kernel
| OpenHD
---
[34]
| Python,
---
C++
(n.d.)
| generic framework
---
(a wrapper for
GPU processing)
| HDTorch
---
[36]
| Python
---
(n.d.)
| random, sandwich,
---
scale, and
scale with
radius encoding
| hdlib
---
[237]
| C (47.5%),
---
Python (25.8%),
CUDA (24.4%),
Shell (2.3%)
| random,
---
N-gram-based
encoding
| Laelaps
---
[69]
| Python,
---
CUDA,
OpenMP
(n.d.)
LBP Code [196]
| PULP-HD
---
[186]
| C (98.8%),
---
MATLAB (1.1%)
| random,
---
Record-based $+$
N-gram-based
encoding
| VoiceHD
---
[19]
| Python
---
(100%)
| random
---
binding
bundling
| MHD
---
[68]
| Python
---
(100%)
| random,
---
Record-based $+$
N-gram-based
| PerfHD
---
[100]
| Python
---
(100%)
| random,
---
Record-based $+$
N-gram-based
| HyperSpec
---
[86]
| Python (88.1%)
---
Cython (8.7%)
C++ (1.6%)
Dockerfile (1.4%)
Shell (0.2%)
| random,
---
Record-based
| HDCluster
---
[21]
| Python (29.1%)
---
Cuda (17.3%)
C++ (38.7%)
Makefile (13.2%)
Shell (1.7%)
| random,
---
Record-based
| PyBHV
---
[238]
| Python (65.9%),
---
C++ (25.6%),
C (8.5%)
| random
---
| HD
---
Classification
[239]
| C++ (43.1%),
---
Cuda (25.5%),
Python (13.4%),
Makefile (12.9%)
Shell (5.1%)
random
| constrained
---
FSCIL
[240]
| Python
---
(100%)
| quasi-random
---
vector generation
for uncorrelation
|  HDC
---
Language
Recognition
[2]
| MATLAB,
---
Verilog
(n.d.)
| dense bipolar
---
$\boldsymbol{\mathcal{HV}}$
encoding
| Dynamic Vision
---
Sensor with HDC
[97]
| C (49.8%),
---
Python (12.4%),
Objective-C (36.6%)
| selective Kanerva
---
coding [195],
Randomized
Activation
Function
| HDC-MER
---
[56]
| MATLAB
---
(100%)
| random
---
non-linear function
| EMG-based
---
gesture
recognition
[82],
Hand gesture
recognition
[58]
| MATLAB
---
(100%)
| random,
---
Record-based $+$
N-gram-based
| On-chip learning
---
HDC library
[152]
| VHDL (91.8%),
---
MATLAB (8.2%)
| random,
---
Record-based $+$
N-gram-based
| HD
---
embedding-BCI
[84]
| Pyhton
---
(100%)
| random projection
---
feature quantization
learned projection
| HDC-EEG-ERP
---
[55]
| MATLAB
---
(100%)
| random
---
binding
bundling
permutation
| HD pattern
---
recognition
[89]
| MATLAB
---
(100%)
| random
---
bundling
permutation
| HDC Parallel
---
Single-pass
Learning
[29]
| Python
---
(100%)
| Gaussian,
---
RBF kernel

n.d.: not defined.

TABLE IX: Summary of noticeable SOTA works highlighting applications, $\boldsymbol{\mathcal{HV}}$ mapping, and hardware. Year, Authors | Contribution |  | Application,
---
Dataset
(Accuracy, D)
| Vector Generation
---
& Encoding
Details
| Environment, Model,
---
or Hardware
Details
| Hardware
---
Efficiency
| 2018,
---
Imani et al. ♠
[68]
| Decreasing
---
classification
cost
| Speech recognition
---
ISOLET
(95.9%, $D$=10,000)
| Random-Bipolar $\boldsymbol{\mathcal{HV}}$
---
Bit-flipping applied
Hierarchical
multi-encoder:
I. Record-based
II. N-gram-based
| Synopsys
---
Design
Compiler
(TSMC 45nm)
| Energy (6.6×)
---
Speed (6.3×)
♠ [68] Imani et al. target reducing the classification cost by inspecting the
reduced $\boldsymbol{\mathcal{HV}}$ size. To achieve this problem, they use a
multi-encoder strategy to best select the proper encoder between record-based
or N-gram-based encoding approaches. The vector generation details on hardware
are not shared, and random generation via nearly orthogonal vectors is
generated with bit-flipping. The bipolar structure is utilized.
| 2020,
---
Nazemi et al. ♠
[64]
| Automatic feature
---
extraction
| Activity Recognition
---
HAR
(96.44%, $D$=10,240)
Speech Recognition
ISOLET
(96.67%, $D$=10,240)
| Random seed $\boldsymbol{\mathcal{HV}}$
---
Bit-flipping
Binding and
Bundling
| FPGA (Xilinx
---
UltraScale+ VU9P)
| BRAMs (1.8%)
---
DSPs (15%)
FFs (0.8%)
LUTs (5.1%)
Latency (23.3 us)
Power (5.3 W)
♠ [64] Nazemi et al. target the automated feature extraction using NNs that
feed an HDC system. They use hard-wired features and LUT-based levels driven
by the DRAM module. The work leads to the idea of an NN-assisted HDC system;
however, dependency on an NN system for full-independent on-edge training
efforts might be further discussed.
| 2018,
---
Wu et al. ❆
[10]
| Exploring the
---
opportunities of
HDC for next
generation
devices
(nanotubes, RRAM)
| 21 European languages
---
classification
Europarl
(98%)
| Evenly spaced
---
time-delay
encoding
| Synopsys
---
Design
Compiler
CNFET and
RRAM-based
design
| # of CNFET
---
(1952)
# of RRAM
(224)
❆ [10] Wu et al. explore the HDC’s novel capacity for emerging device
platforms such as nanotubes. The very interesting side of this work lies in
the area of solid-state circuits; they present a CNFET (carbon nanotube field-
effect transistor) and RRAM-based random projection unit for vector mapping,
which is one of its kind. Further design efforts following the same procedures
in-memory computing platforms may yield fruitful outcomes.
| 2021,
---
Zou et al. ♣
[164]
| Adaptive
---
encoder and
non-linear
interactions
between the
features during
the encoding
| Digit recognition
---
MNIST (>97%)
Power prediction
PECAN (>97%)
Voice recognition
ISOLET (>95%)
Activity recognition
UCIHAR (>98%)
Position recognition
EXTRA (>84%)
($D$ = 4,000 for all)
| Manifold-selection-
---
based
encoding
Gaussian
distribution for
initial vectors
| In software: C++
---
In hardware: FPGA
(Kintex-7)
| 12.3× speed-up
---
19.3× energy-
efficiency
♣ [164] Zou et al. propose an adaptive encoder that performs non-linear
interactions between the features. This work is a leading work that addresses
the static encoder to make an adaptive one. Thus, maximum learning accuracy is
targeted. Another important aspect of this work is the real-time data encoding
and learning property. This is quite important for streaming data and a
dynamic learning platform. An unsupervised manifold technique is utilized
during the vector generation; the Gaussian distribution-based random
$\boldsymbol{\mathcal{HV}}$s are multiplied by the manifold to obtain an
adaptive HD encoder. This work proposes to reduce the $D$ size from 10,000 to
4,000 for the same amount of accuracy.
| 2015,
---
Räsänen ★
[133]
| Vector
---
generation for
non-discrete
data
| Spoken word
---
classification
CAREGIVER Y2 UK corpus
$>97$%, $D$=4,000
| S-WARP
---
Mapping and
Weighted
Accumulation of
Random Projections
| No
---
information
given
| No
---
hardware
implementation
★ [133] Räsänen et al. propose a way to generate $\boldsymbol{\mathcal{HV}}$s
holding local similarities in the input vectors by setting generalization
toward new inputs. The encoding procedure guarantees mapping quasi-orthogonal
vectors for distant inputs. Features from raw data (e.g., mel-frequency from
speech data) are utilized to transform them into the hyperspace. The Weighted
Accumulation of Random Projections (WARP) method and scatter code are utilized
for feature mapping that guides the generation of
$\boldsymbol{\mathcal{HV}}$s. The proposed method brings interesting ideas for
the continuous data from the sensory inputs. However, more of the hardware
implementability must be discussed, considering the current load of the
proposal to the hardware platform.
| 2019,
---
Chang et al. ❃
[56]
| $\boldsymbol{\mathcal{HV}}$
---
embedding
using random
non-linearity
| Galvanic Skin Response,
---
Electroencephalogram,
Electrocardiogram
dataset (AMIGOS)
binary emotion
classification
(76.6%, $D$=10,000)
| Multiplexer-based
---
ternary (-1, 0, +1)
feature
mapping into
hyperspace
| No
---
information
given
| Only system
---
block
diagram
is given
❃ [56] Chang et al. use lightweight design for the embedding of vectors using
multiplexers. The generation step is degraded into a simple operation using
the sign of the biomedical feature for the selection port of the multiplexer.
Multi-modal sensor data are mapped into holistic representations.
| 2020,
---
Kim et al. ✶
[135]
| DNA
---
representation
in high
dimensional
$\boldsymbol{\mathcal{HV}}$s
and
accelerated
pattern match
| DNA Pattern Matching
---
Escherichia coli
Human chromosome14
Random sequence
(>99.99%, $D$=100,000)
| Random-Bipolar
---
base $\boldsymbol{\mathcal{HV}}$s
Shifting and
multiplication-based
encoding
| GPU (NVIDIA
---
GTX 1080 Ti)
and
FPGA (Kintex-7
KC705)
| 44.4× speedup
---
54.1× energy-
efficiency
on FPGA
✶ [135] Kim et al. propose chunk-processing of very long
$\boldsymbol{\mathcal{HV}}$s targeted to represent holistic nucleoid
representations in DNA sequences. The idea behind this work is to parallelize
the operations, especially for ultra-long $\boldsymbol{\mathcal{HV}}$s. The
vector generations are not based on any specific hardware design, and only
just approximate random generations are utilized. It is important to note that
for applications requiring low-count symbols like DNA (Adenine, Guanine,
Cytosine, and Thymine), the number of the generated base
$\boldsymbol{\mathcal{HV}}$s is limited; it does not necessarily base on the
dynamic vector generation. This work is also one of its kind that process
vector size up to 100,000 ultra-long dimensions.
| 2019
---
Liu et al. ✥
[116]
| RRAM-based
---
HDC
in-memory
architecture
| Voice recognition
---
ISOLET
(92.1%, $D$=8,192)
| Block generation of
---
$\boldsymbol{\mathcal{HV}}$s on
crossbar
XOR-summation
encoding
| RRAM,
---
CPU, and
GPU
separately
| 2.28 J Energy
---
in-memory
3960 J Energy
CPU
✥ [116] Liu et al. introduce a modified technique for RRAM devices considering
IMC. The proposed framework suggests a unique approach involving memory-based
bit-flipping, replication, shifting, and catenation steps to generate both
item memory and continuous item memory. Their innovative method presents a
fresh perspective on handling vector generations within the memory.

##  VI Extras: Available Platforms
and SOTA Summary

Additionally, we provide two concluding survey materials to facilitate a swift
understanding of (i) readily available platforms and (ii) the prominent prior
works that can serve as a source of inspiration for HDC researchers in
refining the encoding procedure for their future endeavors.

Several open-source code projects on HDC have been released by various
research groups. We list these prior releases in Table VIII. We assess the
encoding methods showcased in each platform in this table. For instance, the
developers of [236] have implemented random, level, thermometer, and circular
$\boldsymbol{\mathcal{HV}}$ encoding in Python using PyTorch. Another open-
source project, HDTorch [36], is also based on the PyTorch framework. HDTorch
provides options for generating $\boldsymbol{\mathcal{HV}}$s using the random,
sandwich, scale, and scale with radius approaches. Here, the sandwich approach
refers to encoding two neighboring vectors similarly for half of their
elements and setting the remaining elements randomly. The scale method is an
alternative term for level $\boldsymbol{\mathcal{HV}}$ generation, while scale
with radius utilizes a distance parameter called radius to encode vectors
proportionally based on their distance closer than the radius [69].

Kang et al. [34] propose OpenHD, an abstract framework designed for GPU-
powered operations. Their framework enables designers to implement an initial
Python code and then utilize the HD decorator to obtain a GPU-accelerated
version via Just-In-Time (JIT) compilation [70, 171]. The Semantic Vectors
Package in [241] supports dense and sparse random vector encoding for concept-
aware knowledge representation tasks in natural language processing. This
package is implemented in both Java and Python. The hdlib repository [237] is
an open-source code project that offers N-gram-based vector symbolic
classification and includes CPU and GPU-based optimizations. Additionally, a
PyTorch implementation targeting few-shot learning with a combination of HDC
systems and NNs is available in [242]. This repository employs quasi-random
encoding for image data to obtain uncorrelated vectors [240]. We highly
recommend exploring the rest of the platforms for further investigation and
insights.

Finally, it is essential to highlight a summary of remarkable SOTA works in
the literature which have made significant contributions to vector mapping and
encoding. Table IX provides a comprehensive overview of these works, and the
accompanying details encompass various aspects, ranging from dataset
utilization to hardware efficiency. Each entry includes summary notes
pertaining to the overall encoding approach and noteworthy observations.

##  VII Conclusions

This study delves into a comprehensive exploration of hypervector encoding,
the primary and pivotal stage in Hyperdimensional Computing (HDC), utilizing
various methods and techniques, with a particular focus on the hypervector
generation phase. Despite the promising potentials of HDC, there has been a
relatively limited study on the critical step of data generation, known as the
initial hypervector encoding. This encoding process plays a fundamental role
in the architecture design and accuracy of HDC systems. Prior state-of-the-art
research has primarily emphasized the holistic structure of HDC, leaving less
exploration of the promising potential for conducting computations across
paradigms, including stochastic computing (SC), during the hypervector
generation, also referred to as initial vector mapping. In this study, we
addressed this gap by providing an in-depth literature analysis of HDC and
introducing readers to a novel perspective on initial vector mapping. Through
an in-depth exploration of the interplay between SC and HDC, we emphasize
their effectiveness, highlighting the significance of this research in
advancing the field. Our aim is to contribute to a better understanding and
utilization of these computational approaches, thereby fostering further
progress in the HDC domain.

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|  Sercan Aygun (S’09-M’22) received a B.Sc. degree in Electrical &
Electronics Engineering and a double major in Computer Engineering from
Eskisehir Osmangazi University, Turkey, in 2013. He completed his M.Sc. degree
in Electronics Engineering from Istanbul Technical University in 2015 and a
second M.Sc. degree in Computer Engineering from Anadolu University in 2016.
Dr. Aygun received his Ph.D. in Electronics Engineering from Istanbul
Technical University in 2022. Dr. Aygun’s Ph.D. work has appeared in several
Ph.D. Forums of top-tier conferences, such as DAC, DATE, and ESWEEK. He
received the Best Scientific Research Award of the ACM SIGBED Student Research
Competition (SRC) ESWEEK 2022 and the Best Paper Award at GLSVLSI’23. Dr.
Aygun has been selected for the MLCommons Rising Stars program in Machine
Learning and Systems Research in 2023. He is currently a postdoctoral
researcher at the University of Louisiana at Lafayette, USA. He works on
emerging computing technologies, including stochastic computing in computer
vision and machine learning.
---|---
|  Mehran Shoushtari Moghadam (S’22) received the B.Sc. degree in Computer
Engineering - Hardware and the M.Sc. degree in Computer Engineering - Computer
Architecture from the University of Isfahan, Iran, in 2010 and 2016
respectively. He is currently pursuing the Ph.D degree with the Center for
Advanced Computer Studies, School of Computing and Informatics, University of
Louisiana at Lafayette, LA, USA. His research interests include Wireless
Networks, Signal Processing, Computer Architecture, VLSI design, Approximate
Computing, Stochastic Computing and Brain-Inspired Computing.
---|---
|  M. Hassan Najafi (S’15-M’18) received the B.Sc. degree in Computer
Engineering from the University of Isfahan, Iran, the M.Sc. degree in Computer
Architecture from the University of Tehran, Iran, and the Ph.D. degree in
Electrical Engineering from the University of Minnesota, Twin Cities, USA, in
2011, 2014, and 2018, respectively. He is currently an Assistant Professor at
the School of Computing and Informatics, University of Louisiana, LA, USA. His
research interests include stochastic and approximate computing, unary
processing, in-memory computing, and hyperdimensional computing. He has
authored/co-authored more than 60 peer-reviewed papers and has been granted 5
U.S. patents with more pending. In recognition of his research, he received
the 2018 EDAA Outstanding Dissertation Award, the Doctoral Dissertation
Fellowship from the University of Minnesota, and the Best Paper Award at the
ICCD’17 and GLSVLSI’23. Dr. Najafi has been an editor for the IEEE Journal on
Emerging and Selected Topics in Circuits and Systems.
---|---
|  Mohsen Imani (Member, IEEE) received the Ph.D. degree from the Department
of Computer Science, UC San Diego. He is currently an Assistant Professor at
the Department of Computer Science, UC Irvine. He is also the Director of the
Bio-Inspired Architecture and Systems (BIASLab). His contribution has led to a
new direction in brain-inspired hyperdimensional computing that enables ultra-
efficient and real-time learning and cognitive support. His research was also
the main initiative in opening up multiple industrial and governmental
research programs. His research has been recognized with several awards,
including the Bernard and Sophia Gordon Engineering Leadership Award, the
Outstanding Researcher Award, and the Powell Fellowship Award. He also
received the Best Doctorate Research from UCSD and several best paper
nomination awards at multiple top conferences, including Design Automation
Conference (DAC) in 2019 and 2020, Design Automation and Test in Europe (DATE)
in 2020, and International Conference on Computer-Aided Design (ICCAD) in
2020. Furthermore, he received the Best Paper Award at the DATE 2022
Conference.
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