Celtics' Kemba Walker sustains head injury in loss to Nuggets
DENVER – Jamal Murray’s strong finish helped the Denver Nuggets work their way through a stretch of ragged play. His thoughts after the game turned to an injured opponent.
Murray scored 22 points, including two clutch free throws with 1.5 seconds remaining, and the Nuggets hung on to beat the Celtics 96-92 on Friday night in a game overshadowed by a head injury to Boston guard Kemba Walker.
“That’s not something you want to mess around with,” Murray said. “Prayers out to him and hopefully he’s fine.”
Nikola Jokic added 18 points, 16 rebounds and 10 assists for Denver, which improved to 8-0 this season when holding an opponent to fewer than 100 points.
Jaylen Brown had 22 points and 10 rebounds to lead Boston. Jayson Tatum added 16 points and Marcus Smart had 15.
Walker collided with teammate Semi Ojeleye late in the second quarter, striking Ojeleye’s abdomen area head-first and going down on to the court in a heap.
Walker grimaced in pain as he went down and play was stopped as medical personnel from both teams tended to the star guard who was prone on the floor for several minutes. His teammates gathered around him as did Nuggets players, plainly concerned about Walker. A brace was placed around his neck to stabilize the area and he was strapped to a backboard before being placed onto a gurney and wheeled off the court in front of a hushed crowd.
“I saw him in the ambulance at halftime,” Celtics coach Brad Stevens said. “He had his wherewithal about him. He was in decent spirits, which is good.”
In a tweet, the Celtics said Walker has been diagnosed with concussion-like symptoms and was transported to a hospital for further evaluation.
Walker, the Boston’s leading scorer, had three assists and a pair of steals before leaving the game.
“Our prayers and our energy are with him,” Brown said. “He’s probably the smallest dude on the floor every time he steps out, but he’s probably got the biggest heart. We definitely lean on him and we’ll welcome him back when he rests up and everything is taken care of.”
Lakers 130, Thunder 127
In Oklahoma City, Anthony Davis scored 24 of his 33 points in the second half to help Los Angeles defeat the hosts.
Davis also had 11 rebounds and seven assists, and LeBron James added 23 points and 14 assists. The Lakers have won six in a row to improve the best record in the NBA to 13-2.
Shai Gilgeous-Alexander scored 24 points and Steven Adams added 22 for the Thunder. They have lost five of six.
Los Angeles guard Rajon Rondo was ejected early in the fourth quarter after a kick to Dennis Schroder’s groin area.
Wizards 125, Hornets 118
In Washington, Bradley Beal had 30 points and 12 assists, Thomas Bryant added 21 points and 11 rebounds and the Wizards ovrcame a 13-point deficit in the fourth quarter to beat Charlotte.
Davis Bertans had 20 points, hitting six 3-pointers to help the Wizards win two in a row for the first time this season. Rookie forward Rui Hachimura added 15 points, two rebounds and two steals in 21-plus minutes. It was Hachimura’s second straight game with 15 points. Miles Bridges scored a career-high 31 points for the Hornets.
Mavericks 143, Cavaliers 101
In Dallas, Luka Doncic had 30 points and 14 assists with former Mavericks teammate Dirk Nowitzki watching as a retiree for the first time.
Nowitzki stayed away for the first eight Dallas home games after setting an NBA record of 21 seasons with the same franchise while finishing last season as the highest-scoring foreign-born player in league history. The big German got a standing ovation when shown on the video board in the first quarter from his courtside seat next to owner Mark Cuban.
Rookie Darius Garland scored a career-high 23 points for Cleveland.
Clippers 122, Rockets 119
In Los Angeles, Kawhi Leonard hit the game-winning jumper with 15 seconds remaining to finish with 24 points, as the Clippers edged Houston.
The Rockets’ Russell Westbrook missed at the other end and Paul George got the rebound while getting fouled. He made both free throws with 1 second left to complete a wild finish and help Los Angeles improve to 10-1 at home with its fourth win in a row overall.
George scored 19 points in his second game playing with Leonard. Lou Williams led the Clippers with 26 — all in the second half. Montrezl Harrell added 18 points.
James Harden had 37 points and 12 assists for the Rockets. Westbrook added 22 points before fouling out late and Clint Capela had 17 points and 19 rebounds. Those three plus P.J. Tucker had at least four fouls.
76ers 115, Spurs 104
In Philadelphia, Tobias Harris scored 26 points, Joel Embiid had 21 points and 14 rebounds and the hosts handed San Antonio its eighth straight loss — the Spurs’ longest under longtime coach Gregg Popovich.
Ben Simmons had a triple-double with 10 points, 13 assists and 10 rebounds for the 76ers.
San Antonio last dropped eight in a row in November 1996 under coach Bob Hill. Popovich was the team’s general manager at the time. He fired Hill later that season and began his long run of success.
DeMar DeRozan had 29 points for the Spurs.
Jazz 113, Warriors 109
In Salt Lake City, Donovan Mitchell scored 30 points and Mike Conley had 27 to help Utah beat undermanned Golden State.
Minutes after the end of an NBA game, the arena was evacuated because of a suspicious package. Most fans had already left the building when players, coaches and reporters were instructed to leave.
Bojan Bogdanovic added 17 points for the Jazz, and Rudy Gobert had 19 rebounds and seven blocks.
Alec Burks scored 20 points for the Warriors.
Pistons 128, Hawks 103
In Detroit, Andre Drummond had 23 points and 15 rebounds and the Pistons had their highest-scoring first half since 1983.
Detroit led 76-57 at halftime, and the Pistons reached 100 points with over 5 minutes remaining in the third quarter. It was the most points in the first half for Detroit since it scored 77 on Dec. 2, 1983, also against the Hawks.
Atlanta has dropped five straight, and the Hawks allowed at least 120 points for the eighth game in a row.
Blake Griffin scored 24 points. DeAndre’ Bembry led Atlanta with 22 points.
Heat 116, Bulls 108
In Chicago, Jimmy Butler had 27 points against his former team and Miami beat the Bulls for its fifth straight victory.
Butler played for Chicago from 2011 to 2017. He was 7 of 10 from the field and had seven assists and five rebounds. Bam Adebayo added 16 points and 14 rebounds. Kendrick Nunn scored 13 of his 21 points in the first quarter to help the Heat improve to 11-3.
Zach Lavine led the Bulls with 15 points.
Nets 116, Kings 97
In New York, Spencer Dinwiddie scored 23 points and Joe Harris added 22 in Brooklyn’s victory over Sacramento.
Harrison Barnes led the Kings with 18 points. Buddy Hield had 16.
GET THE BEST OF THE JAPAN TIMES IN FIVE EASY PIECES WITH TAKE 5
JOIN THE CONVERSATION


|
IOH
<IP_ADDRESS>
Experimentation procedure for Iterative Optimization Heuristics
|
API related to the EAF logger. More...
Classes | |
| struct | ioh::logger::eaf::Point |
| A point in the quality/time 2D space. More... | |
| struct | ioh::logger::eaf::RunPoint |
| A point and its corresponding run index. More... | |
| class | ioh::logger::Stat< T > |
| Interface for classes that computes statistics over an eaf::Levels' data. More... | |
| class | ioh::logger::NadirStat< T > |
| Interface for statistics over an EAF, which depend on a nadir reference point. More... | |
Functions | |
| bool | ioh::logger::eaf::descending_qual (const eaf::Point &a, const eaf::Point &b) |
| Comparator for sorting a vector of eaf::Point with descending qualities. More... | |
| bool | ioh::logger::eaf::descending_time (const eaf::Point &a, const eaf::Point &b) |
| Comparator for sorting a vector of eaf::Point with descending time. More... | |
| bool | ioh::logger::eaf::ascending_time (const eaf::Point &a, const eaf::Point &b) |
| Comparator for sorting a vector of eaf::Point with ascending times. More... | |
| bool | ioh::logger::eaf::ascending_qual (const eaf::Point &a, const eaf::Point &b) |
| Comparator for sorting a vector of eaf::Point with ascending qualities. More... | |
API related to the EAF logger.
|
inline |
Comparator for sorting a vector of eaf::Point with ascending qualities.
a
is smaller than the time of b
.
|
inline |
Comparator for sorting a vector of eaf::Point with ascending times.
a
is smaller than the time of b
.
|
inline |
Comparator for sorting a vector of eaf::Point with descending qualities.
a
is larger than the quality of b
.
|
inline |
Comparator for sorting a vector of eaf::Point with descending time.
a
is larger than the quality of b
.


Book your Seats!
Name *:
Number of Seats *:
Start Selecting
SCREEN
Selected Seat
Reserved Seat
Empty Seat
1
2
3
4
5
6
7
8
9
10
11
12
A
B
C
D
E
F
G
H
I
J
Confirm Selection
Proceed
Name
Number of Seats
Seats


Select RBG color range of background you are using. (Recommend green background with uniform light focus)


How to relax as a journalist ...
Time: 5 minutes to numerous hours
Helpfullness rating: 100%
Are you wondering how to wind down and relax after a busy day of being a journalist? Below you can find 5 tips for relaxing like a journalist!
-
Snack (healthy!) to destress.
When it comes to food, they can work for or against your body and your mind. It turns out that certain foods cue our brains to give off certain hormones and put us in our happy places. Here’s a few you can try: Mango to lower cortisol levels (that little bugger of a hormone that makes us feel stressed). Dark chocolate a little over an ounce can reportedly calm the nerves and even start to stabilize metabolism levels.Chewing gum (the act of repeated chewing, actually) can help fight anxiety and stress, combating pretty much any negative mood.Complex carbs, like whole-grain breads and whole oatmeal can prompt the brain to produce serotonin.Something crunchy, nuts cerelry or pretzels.It is reported that stressed individuals often crave crunchy foods, and that’s likely linked back to chewing (that fights anxiety, as listed above).
-
Put on your favorite song.
Studies show that listening to calming music that you like can help lower your blood pressure, heart rate, and reduce perceived levels of anxiety.Not just claming music, it is whatever YOU find calming! It doesn’t hurt to dance it out, either. Not only is dance a great way to get in your cardio workout, but there’s science to back up the fact that it can lower anxiety, too. So hop on your bed and start getting jiggy for the sake of your body and your mind.
-
Read a good book or write in your journal.
Research says that writing down your worries gets rid of them and helps you feel more confident, which can improve outcomes. Or try hankering down with a good book. If it’s full of jokes, even better. If you’re looking for something a little more constructive, try a word or crossword puzzle to get your mind away from the stress and into the problem-solving zone.
-
Try aromatherapy.
The soothing scents of aromatherapy travel up our olfactory system and into our brain, taking over where stress and anxiety once set up camp. Just a whiff of one of these smells can bring a relaxing feeling over your entire body. Rose, bergamot, lavender, orange, lemon, and sandalwood are all great options. But whatever scent makes you feel good is good, too.
-
Grab a cup of tea.
Did you know that chamomile, passionflower, and green teas all have stress-fighting effects? Yep.


{%extends "base.html"%} {% load bootstrap3 %} {{block.super}} {% block content%}
{{ post.description }}
{% endautoescape %}- {{ user.post.username }} -
{% load ratings %}click image to view more ratings
click here to view the site {% else %}{% endif %}
{% endif %} {% endfor %}
klausawwardz Inc , will help developers from allover showcase their work [as well as inpiration]
© All right Reversed.Niklauspeter


By Kat Drobnjakovic and Martin Picard
In real open source, you have the right to control your own destiny.Linus Torvalds
Free does not mean no cost.
Features are rolled out when they are rolled out - no strict schedule.
Community driven development - purpose and direction of the software changes naturally.
Less effort given to documentation and usability - there will be a learning curve to getting started.
Lack of contractual commitment to tech support.
Functionality becomes obvious when source code is available.
Collaboratively driven - spark ideas and improve algorithms to design better software.
Competitive edge.
Large and active communities create innovative software.
Cooperation increases quality.
Maintenance is tasked to the entire community and not the individual.
Marc Andreessen tweeted: "The best minds of my generation are thinking about how to make people buy support contracts for free software." --Anonymous
A lot of work will result in a low return.
Other methods of income might need to be used (eg. Dropbox, RedHat).
Can lead to embarrassment for your company if the quality is poor.
People with malicious intents may find security problems easier to exploit them.
Uber recently pushed secret passwords in plaintext to their GitHub.
Bots scrap GitHub and other code bases for secrets all the time.
Going open source is good for reputation and seen as giving back to the community.
Open source projects create great communities and open many possibilities for collaboration between businesses and the OS community.
Many open source projects are at the forefront of innovation and possess many cutting edge features that release sooner than proprietary software.
Popular OSS are often of equal or greater quality than their commercial counterpart.
Most of the greatest minds in programming contribute or have contributed to open source. (Linus Torvalds, Ken Thompson, etc)


PMR Exposure Mockups
Here we list the various mockups and their purpose. More information available: https://github.com/nickerso/exposure-mockups.
- Example
- example/index.html
- This is an example mostly for the purpose of showing specific JS and HTML aspects.
- TenTusscher et al. 2004: Ventricular Cell Model
- Figure 1
- Figure 1 of TenTusscher et al. which shows steady state and time constant curves for INa (fast_sodium_current).
- Figure 5
- Figure 5 of TenTusscher et al. which shows steady state and time constant curves for IKs (slow_time_dependent_potassium_current).
- Na/Ca Exchanger Current
- Information regarding the component and subsequent parameters involved with the Na/Ca Exchanger Current (sodium_calcium_exchanger_current).


Enter the credentials you made during registration in the fields below. Ask for help in our slack channel if you did not register through our website.
All passwords must be at least 8 characters long with at least one uppercase letter, one lowercase letter and one numeric digit.
Password confirmation must match the value of the password field. Pretty standard stuff really.


ng2-google-recaptcha samples
A small set of reCAPTCHA samples
Standard reCAPTCHA out of the box
reCAPTCHA using the audio and 'dark' theme


{{ define "main" }}
I'm a Designer for Web services and app focus on User experience and Interfaces.
{{ .Summary }}


Australian Informatics Competition
Detail: The Australian Informatics Competition (AIC) is a one-hour problem-solving competition which seeks to identify computer programming potential; something which students might not normally have an opportunity to demonstrate. The AIC is not a programming competition and no programming experience is required. Results in the AIC often enable a talent to be discovered which is not always apparent or sought in normal classroom activities. Some questions test the ability to accurately perform procedures. Others require logical thought while the more challenging problems require the identification and application of algorithms.
Contact: Lydia Scott, Ph: 1300 464 388<EMAIL_ADDRESS>Duration: 1 hour
Age Group: All high school students, separate competitions for Junior (Years 7 and 8), Intermediate (Years 9 and 10) and Senior (Years 11 and 12) (note that an Upper Primary level will be introduced in 2015).
Gender: Girls, Boys
Location: All participating Australian Secondary Schools
Event Dates: Tuesday 25 March 2013, but entries close Friday 14 March 2013


My Accounts
Test
Transfers & Payments
Test
Advances & Deposits
Test
Customer Service
Test
Products & Services
Test


CRONTABS
Section: Crontabs users' Manual (4)Updated: 2009-06-16
Index Return to Main Contents
NAME
crontabs - configuration and scripts for running periodical jobsSYNOPSIS
run-parts <directory>DESCRIPTION
Crontabs is historical name for run-parts script and system crontab. Run-parts runs all executables in the specified directory. The execution of files can be allowed or denied by creating file jobs.allowor jobs.deny which worked similar as other allow/deny config files. The file must be created in the specified directory.
Historically the crontab file contained configuration which called run-parts on files in cron.{daily,weekly,monthly} directories. These jobs are now run indirectly through anacron to prevent conflicts between cron and anacron. That means the anacron package has to be installed if the jobs in these directories should be running. Refer to the anacron(8) how to limit the time of day of the job execution.
EXAMPLE
/etc/cron.daily/jobs.deny could contain for example 0logwatch which forbid execution of this script.SEE ALSO
anacron(8), crontab(5)Index
This document was created by man2html, using the manual pages.
Time: 05:33:53 GMT, December 24, 2015


Your email
Your password
Keep me logged in
Not a member yet ? Join us
Please confirm your password
Already a member ? Go and log in


From a purely visual standpoint, all you need is a container of class s-expandable
and a child of class s-expandable--content
. Toggle the state class is-expanded
on the container to collapse / expand the content. Care must be taken to keep the collapsing functionality accessible.
Accusata reprimique interesset in sea, est graece dictas scriptorem ea. Consul facete mediocritatem quo et. Idque hendrerit theophrastus in vim, eum possit feugiat fastidii id. Idque invenire at quo, accusata salutandi sadipscing et qui. Eos doming adipiscing ea, eu pri debitis indoctum dissentiet. At libris labores adolescens eos, ex nec nobis aeterno.
It’s also possible to control the state of multiple elements from a single s-expandable-control
by listing all the ids
for the controlled elements in the aria-controls
attribute.
Accusata reprimique interesset in sea, est graece dictas scriptorem ea. Consul facete mediocritatem quo et. Idque hendrerit theophrastus in vim, eum possit feugiat fastidii id. Idque invenire at quo, accusata salutandi sadipscing et qui. Eos doming adipiscing ea, eu pri debitis indoctum dissentiet. At libris labores adolescens eos, ex nec nobis aeterno.
In the usual case in which you have a button or other clickable element that toggles the expanded state, you can use the built-in s-expandable-control
functionality. See the JavaScript introduction for general information on JS in Stacks.
s-expandable
elements an id
attribute.aria-controls
attribute whose value is a space-separated list of all IDs in 1.aria-expanded
attribute whose value is true
or false
depending on the initial state of your expandables.data-controller="s-expandable-control"
attribute.tabindex="0"
aria-label
attribute that makes it clear that this is a expanding/collapsing control, unless this is already clear from its text contentA common need is for one or more CSS classes to be applied to the expandable control whenever the state is toggled, e.g. to indicate a “selected” state. To achieve this, you can add the data-s-expandable-control-toggle-class
attribute. The value should be a space-separated list of CSS classes. These classes will be added to the control whenever it expands the expandable, and removed whenever it collapses it.
See the previous section for an example of all of this.
If you are writing custom CSS to indicate the selected state of the expandable control, consider targetting [aria-controls="true"]
instead of creating a new class.
If your expandable control is a checkbox or radio button, then the visibility of the expandable will be synchronized with the radio / checkbox state:
When an s-expandable-control
collapses or expands an element, it will fire an event of type s-expandable-control:hide
or s-expandable-control:show
, respectively. This event is fired synchronously. The event’s target element is the s-expandable-control
element, not the expandable itself.


Account
Wishlist
Cart
Checkout
Home
All Products
Reviews
About Us
Contact Us
New Arrivals
F1 Sneakers X
Nike Triple T
Nike Sand Z
Randabam High Heels
Featured Products
Nike Sport
Echo Heel
Gen Z Shoes
Z Stars
Clearance Sale
Brown Boots
Purple Boots
Hot Pink Boots
Invictus Sneaker


RD-D2 Travel Suitcase
Banana Slicer
Bathroom Stand
Yellow Boots
Breakfast Machine
Meatball Bubblegum
Chair
Cthulhu
Doggy Duck
Dragon Meat
Pen
Pet Sweep
Pizza Scissors
Shark Bag
Baby Sweeper
Tauntaun
Unicorn Meat
USB
Water Can
Wine Glass
Quantity
Name
Street
City
State
ZIP Code
Phone Number
Credit Card Number
Submit Order


Passed
Passed example 1
This img
element with an empty alt
attribute which is not included in the accessibility tree is purely decorative.

Happy new year!

Passed example 2

Happy new year!

Passed example 3
This img
element that is ignored by assistive technologies because it has an explicit semantic role of none
is purely decorative.

Happy new year!

Passed example 4
This svg
element that is ignored by assistive technologies because it has no attribute that would give it an accessible name is purely decorative.

Happy new year!

<svg height="200" xmlns="http://www.w3.org/2000/svg">
<polygon points="100,10 40,180 190,60 10,60 160,180" fill="yellow" />
</svg>
Passed example 5
This canvas
element that is ignored by assistive technologies because it has no attribute that would give it an accessible name is purely decorative.

Happy new year!

<canvas id="newyear" width="200" height="200"></canvas>

Failed
Failed example 1
This img
element with an empty (""
) alt
is not purely decorative.

Failed example 2
This img
element which is not included in the accessibility tree because it has an explicit semantic role of none
is not purely decorative.

Failed example 3
This img
element which is not included in the accessibility tree because it has an explicit semantic role of none
is not purely decorative.

Failed example 4
This svg
element which has a semantic role of graphics-document
and an empty (""
) accessible name is not purely decorative.

Best W3C logo:

<svg viewBox="0 0 512 512">
<path d="M108.4 0h23v22.8h21.2V0h23v69h-23V46h-21v23h-23.2M206 23h-20.3V0h63.7v23H229v46h-23M259.5 0h24.1l14.8 24.3L313.2 0h24.1v69h-23V34.8l-16.1 24.8l-16.1-24.8v34.2h-22.6M348.7 0h23v46.2h32.6V69h-55.6"/>
<path fill="#e44d26" d="M107.6 471l-33-370.4h362.8l-33 370.2L255.7 512" />
<path fill="#f16529" d="M256 480.5V131H404.3L376 447" />
<path fill="#ebebeb" d="M142 176.3h114v45.4h-64.2l4.2 46.5h60v45.3H154.4M156.4 336.3H202l3.2 36.3 50.8 13.6v47.4l-93.2-26" />
<path fill="#fff" d="M369.6 176.3H255.8v45.4h109.6M361.3 268.2H255.8v45.4h56l-5.3 59-50.7 13.6v47.2l93-25.8" />
</svg>
Failed example 5
This canvas
element which has no semantic role and an empty (""
) accessible name is not purely decorative.
<canvas id="w3c" width="200" height="60"></canvas>

Inapplicable
Inapplicable example 1
This img
element is included in the accessibility tree because the alt
attribute is not empty (""
).
="W3C" />
Inapplicable example 2
This img
element is neither visible nor included in the accessibility tree.

Inapplicable example 3
This img
element is not visible because it is positioned off screen.

Inapplicable example 4
This svg
element is ignored because it is a child of a link that provides its accessible name.

<svg height="200" xmlns="http://www.w3.org/2000/svg">
<polygon points="100,10 40,180 190,60 10,60 160,180" fill="yellow" />
</svg>

Inapplicable example 5
This svg
element has a semantic role of img
and an accessible name from its aria-label
attribute.
<svg viewBox="0 0 512 512" role="img" aria-label="HTML 5 logo">
<path d="M108.4 0h23v22.8h21.2V0h23v69h-23V46h-21v23h-23.2M206 23h-20.3V0h63.7v23H229v46h-23M259.5 0h24.1l14.8 24.3L313.2 0h24.1v69h-23V34.8l-16.1 24.8l-16.1-24.8v34.2h-22.6M348.7 0h23v46.2h32.6V69h-55.6" />
<path fill="#e44d26" d="M107.6 471l-33-370.4h362.8l-33 370.2L255.7 512" />
<path fill="#f16529" d="M256 480.5V131H404.3L376 447" />
<path fill="#ebebeb" d="M142 176.3h114v45.4h-64.2l4.2 46.5h60v45.3H154.4M156.4 336.3H202l3.2 36.3 50.8 13.6v47.4l-93.2-26" />
<path fill="#fff" d="M369.6 176.3H255.8v45.4h109.6M361.3 268.2H255.8v45.4h56l-5.3 59-50.7 13.6v47.2l93-25.8" />
</svg>
Inapplicable example 6
This canvas
element is not visible because it is completely transparent.
<canvas width="200" height="200"></canvas>
Inapplicable example 7
This canvas
element has a semantic role of img
and an accessible name from its aria-label
attribute.
<canvas id="w3c" width="200" height="60" role="img" aria-label="WCAG Rules!"></canvas>

Inapplicable example 8
This img
element is visible but included in the accessibility tree.
Note: While it might be better for the PDF icon to be ignored by assistive technologies, because assistive technologies will announce “PDF” twice, the image is not purely decorative. Having assistive technologies ignore it is not required by Success Criterion 1.1.1 Non-text content.
 PDF document
Inapplicable example 9
This is a div
element with a background image. Background images must be tested separate from this rule.

Happy new year!

Inapplicable example 10
This img
element has an src
attribute which will cause the image request state to be Broken.


- ImageBubbles - Static variable in class in.definex.String.XPaths
-
- ImageDownloadIcon - Static variable in class in.definex.String.XPaths
-
- ImageFromImageBubble - Static variable in class in.definex.String.XPaths
-
- ImageShareIcon - Static variable in class in.definex.String.XPaths
-
- in.definex - package in.definex
-
- in.definex.Action - package in.definex.Action
-
- in.definex.Action.Core - package in.definex.Action.Core
-
- in.definex.Action.Core.Checker - package in.definex.Action.Core.Checker
-
- in.definex.ChatSystem - package in.definex.ChatSystem
-
- in.definex.ChatSystem.Core - package in.definex.ChatSystem.Core
-
- in.definex.Console - package in.definex.Console
-
- in.definex.Console.Core - package in.definex.Console.Core
-
- in.definex.Database - package in.definex.Database
-
- in.definex.Database.Core - package in.definex.Database.Core
-
- in.definex.Feature - package in.definex.Feature
-
- in.definex.Feature.Accounts - package in.definex.Feature.Accounts
-
- in.definex.Feature.GroupConfig - package in.definex.Feature.GroupConfig
-
- in.definex.Feature.Help - package in.definex.Feature.Help
-
- in.definex.Functions - package in.definex.Functions
-
- in.definex.NetworkJob - package in.definex.NetworkJob
-
- in.definex.Scheduler - package in.definex.Scheduler
-
- in.definex.String - package in.definex.String
-
- inCorrectArguments - Static variable in class in.definex.String.Strings
-
- init() - Static method in class in.definex.Console.Log
-
load debug settings from configuration
run in init method in looper in the end
- init() - Method in class in.definex.Database.DatabaseManager
-
called to initialize the database which changes the version,
called at the end of init method in Looper class
- init() - Method in class in.definex.Scheduler.ScheduleManager
-
Loads the schedule map from database,
and then schedules them.
- inMessageBubbles - Static variable in class in.definex.String.XPaths
-
- inputBody - Static variable in class in.definex.String.XPaths
-
- inSufficiantPermission - Static variable in class in.definex.String.Strings
-
- invalidArgumentsRespose() - Method in class in.definex.Feature.Command
-
Creates response for invalid argument
- isQuit() - Method in class in.definex.Looper
-
Status of the program.
- isSuccess() - Method in enum in.definex.Action.RemoteActionCall.Response
-
- isWorking() - Method in class in.definex.Action.ActionManager
-
returns working status for the actionManager


| The following
is a list of corrections for known errors in "The SPARC
Architecture Manual, Version 9" book. Page number references
are taken from the 1st (1994) printing, R1.4.2 (revision
1.4.2, identified by the text "SAV09R1429309" inside the
front cover), unless otherwise indicated. |
[1] Page
212 (second page of the Read State Register description),
4th paragraph from the top is printed as:
"RDFPRS waits for all pending FPops to
complete before reading the FPRS register."
It *should* read:
"RDFPRS waits for all pending FPops **and
loads of floating-point registers** to complete before reading
the FPRS register."
[2] Page 234 (Tagged
Add):
The "op3" column is incorrect in the Opcode table;
the low-order bit should be "0" for all Tagged-Add instructions.
The table should read:
| Opcode |
op3 |
Operation |
| TADDcc |
10 0000 ... |
|
| TADDccTV |
10 0010 ... |
|
|
|
|
[3] Page
80 (subsection <IP_ADDRESS>, RESTORED description):
In the last line of the <IP_ADDRESS>, change:
CLEANWIN < NWINDOWS
to:
(CLEANWIN < (NWINDOWS-1))
[4] Page 216 (RESTORED):
Third paragraph, last sentence, change
CLEANWIN != NWINDOWS
to:
(CLEANWIN < (NWINDOWS-1))
[5] Page 76, Section
6.3.4.[12] (branches):
A *taken* conditional branch (not just a conditional branch)
should have been referred to in the last sentences of two
subsections.
Change the last sentence in <IP_ADDRESS>, "Conditional
Branches", to:
Note that the annul behavior of a taken
conditional branch is different from that of an unconditional
branch.
And change the last sentence in <IP_ADDRESS>,
"Unconditional Branches" to:
Note that the annul behavior of a unconditional
branch is is different from that of a taken conditional
branch.
[6] Page 290, Section
G, Table 43:
In the table entries for "cas", "casl", "casx", and "casxl",
the built-in constant names beginning with "ASI" should all
be preceeded by "#" (as they were correctly specified on p.286).
[7] Page 242, Write
State Register page:
In the Exceptions section:
"WRASR with rs1=16..31"
should read:
"WRASR with rd=16..31".
[8] Page 57, subsection
5.2.10 (Register-Window State Registers):
A clarification has been added to Section 5, to allow an implementation
with 16 or fewer register windows the option to implement
the CWP, CANSAVE, CANRESTORE, OTHERWIN, and CLEANWIN registers
with fewer than 5 bits each, if desired. The following text
was added:
IMPL. DEP. #126: Privileged registers CWP,
CANSAVE, CANRESTORE, OTHERWIN, and CLEANWIN contain values
in the range 0..NWINDOWS-1. The effect of writing a value
greater than NWINDOWS-1 to any of these registers is undefined.
Although the width of each of these five registers is nominally
5 bits, the width is implementation-dependent and shall be
bewteen ceil(log2(NWINDOWS)) and 5 bits, inclusive. If fewer
than 5 bits are implemented, the unimplemented upper bits
shall read as 0 and writes to them shall have no effect. All
five registers shall be the same width.
[9] Page 268, Table
32:
As a privileged instruction, "RDPR" should be listed with
a trailing superscript "P".
[10] Pages 58-59,
subsection subsection 5.2.10 (Register-Window State Registers):
Added note to descriptions of CWP, CANSAVE, CANRESTORE, OTHERWIN,
and CLEANWIN registers that the effect of writing a value
to them greater than NWINDOWS-1 is undefined.
[11] Page 81:
In section 6.3.9, "FMOVc" was corrected to read "FMOVr".
[12] Page 81:
In section 6.3.9, a sentence was added stating that FSR.cexc
and FSR.ftt are cleared by FMOVcc and FMOVr whether or not
the move occurs.
[13] Page 171,
Annex A: Sentence added specifying that LDFSR does not affect
the upper 32 bits of FSR.
[14] Page 220(r142)/A.49(r142),
third paragraph:
The words "the" and "and" were transposed in the implementation
dependency description. It now reads: "The location of the
SIR_enable control flag and the means of accessing the SIR_enable
control flag..."
[15] Page 229,
paragraph beginning "Store integer...": "...used for the load..."
changed to "...used for the store...".
[16] Page 231,
Annex A: Corrected SWAP deprecation note to recommend
use of "CASA" or "CASXA" (not "CASX") in place of SWAP.
[17] Page 258,
D.3.3., rule (1): The text was clarified, to read "(1) The
execution of Y is conditional on X, and S(Y) is true."
[18] Page
312, Annex I:
Missing word "not" added to
Compatibility Note: "The coprocessor opcodes were eliminated
because they have not been used in SPARC-V7 and SPARC-V8,
..." ^^^
[19] Page 195,
Annex A:
Order of instructions in Suggested Assembly Language Syntax
was rearranged to correspond to order of the instructions
in the Opcode/op3/Operation table above it.
"movre" and "movrz", as the assembly-language
mnemonic and its synonym, were exchanged to correspond with
the instruction name of MOVRZ.
"movrne" and "movrnz", as the assembly-language
mnemonic and its synonym, were exchanged to correspond with
the instruction name of MOVRNZ.
[20] Page 228,
Annex A:
Order of instructions in Suggested Assembly
Language Syntax was rearranged to correspond to order of the
instructions in the Opcode/op3/Operation table above it.
[21] Page 241,
Annex A:
Added footnote to Suggested Assembly Language Syntax table,
noting that the suggested syntax for WRASR with rd=16..31
may vary, citing reference to implementation dependency #48.
(Suggested Assembly Language Syntax is just
that -- *suggested* -- so isn't part of the architecture specification
anyway, but this change makes it clearer that if bits are
interpreted differently in the instruction, one should expect
its assembly-language syntax to change, as well)
[22] Page
40, Table 7:
Changed leftmost column text
as follows:
"Single" to "Single f.p. or 32-bit integer"
"Double" to "Double f.p. or 64-bit integer"
"Quad" to "Quad f.p."
| Corrections 22-57 were incorporated
into R1.4.5, Dec 1999, | | which was to be used for the
2nd printing of the book. | | R1.4.5 (revision 1.4.5)
can be identified by the text | | "SAV09R1429309" inside
the front cover of the book. | | These corrections also
appear in all subsequent revisions. |
[23] p.13, subsection
2.57, definition of "reserved":
Wording:
"...intended to run on future version of"
was corrected to read:
"...intended to run on future versions of".
The sentence beginning "Reserved register
fields" was amend to read: "Reserved register fields should
always be written by software with values of those fields
previously read from that register, or with zeroes; they should
read as zero in hardware."
[24] p.21(r142),
Editor's Notes:
Added Les Kohn's name to the Acknowledgements.
[25] p.28(r142),
Tables 3,4,5:
Made use of hyphens & dashes made consistent, and easier to
read.
[26] p.30(r142),
paragraph just above subsection 5.1:
Changed end of sentence to read:
"...should be written with the values of
those bits previously read from that register, or with zeroes."
[27] p.40(r142),
Table 7:
Added lines for 32-bit and 64-bit signed integers in f.p.
registers, for clarity.
[28] p.51, Figure
17:
Added bits 11..10 to the figure, so it looks like:
| PID1 |
PID0 |
CLE |
TLE |
MM |
RED |
PEF |
AM |
PRIV |
IE |
AG |
| 11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
|
| \_________/ (changed here) |
[29] p.52(r142),
inserted new subsection <IP_ADDRESS> before old one:
"IMPL. DEP. #127: The presence and semantics of PSTATE.PID1
and PSTATE.PID0 are implementation-dependent. Software intended
to run on multiple implementations should only write these
bits to values previously read from PSTATE, or to zeroes.
See also TSTATE bits 19..18."
[30] p.55(r142),
Figure 22, (TSTATE register):
Extended the "saved PSTATE" field up through bit 19 of TSTATE;
changed the diagram to look like:
| ... |
ASI from TL=x |
--- |
PSTATE from TL=X |
... |
|
|
|
| |
|
\________/ (changed
here) |
|
|
[31] p.56(r142):
Added a new paragraph to the end of subsection 5.2.6:
"TSTATE bits 19 and 18 are implementation-dependent.
ImplDep#126: If PSTATE bit 11 (10) is implemented, TSTATE
bit 19 (18) shall be implemented and contain the state of
PSTATE bit 11 (10) from the previous trap level. If PSTATE
bit 11 (10) is not implemented, TSTATE bit 19 (18) shall
read as zero. Software intended to run on multiple implementations
should only write these bits to values previously read from
PSTATE, or to zeroes."
[32] p.57(r142),
subsection 5.2.10 (Register-Window State Registers): Added
implementation dependency #126:
IMPL. DEP. #126: Privileged registers CWP,
CANSAVE, CANRESTORE, OTHERWIN, and CLEANWIN contain values
in the range 0..NWINDOWS-1. The effect of writing a value
greater than NWINDOWS-1 to any of these registers is undefined.
Although the width of each of these five registers is nominally
5 bits, the width is implementation-dependent and shall be
between ceil(log2(NWINDOWS)) and 5 bits, inclusive. If fewer
than 5 bits are implemented, the unimplemented upper bits
shall read as 0, and writes to them shall have no effect.
All five registers should have the same width.
[33] pp.58-9(r142),
subsection 5.2.10 (Register-Window State Registers):
Added note to descriptions of CWP, CANSAVE, CANRESTORE, OTHERWIN,
and CLEANWIN registers that the effect of writing a value
to them greater than NWINDOWS-1 is undefined.
[34] p.76, Section
6:
Last sentence in <IP_ADDRESS>, "Conditional Branches" changed to:
Note that the annul behavior of a taken
conditional branch is different from that of an unconditional
branch.
And the last sentence in <IP_ADDRESS>, "Unconditional
Branches" changed to:
Note that the annul behavior of a unconditional
branch is is different from that of a taken conditional branch.
[35] p.80(r142),
<IP_ADDRESS>(r142), RESTORED:
correct the equation with CLEANWIN to read
"(CLEANWIN < (NWINDOWS-1))".
and correct the text above it.
[36] p.81(r141/r142):
In section 6.3.9, "FMOVc" was corrected to read "FMOVr".
[37] p.81(r141/r142):
In section 6.3.9, a sentence was added stating the clearing
of FSR.cexc and FSR.ftt during condition moves FMOVcc and
FMOVr:
FMOVcc and FMOVr instructions clear these
FSR fields regardless of the value of the conditional predicate.
[38] p.121(r141/r142):
An index entry for "non-faulting loads" was fixed in section
8.3.
[39] p.151(r142),
A.9(r142), Compare and Swap page:
Added mention of CASL and CASXL to the Programming Note:
Compare and Swap Little (CASL) and Compare
and Swap Extended Little (CASXL) synthetic instructions are
available for "little endian" memory accesses.
[40] p.171, Annex
A, "Load Floating-Point":
Sentence added:
The upper 32 bits of FSR are unaffected by LDFSR.
[41] p.181(r141/r142):
Section number "A.31" was fixed so it now increments to A.32.
All following section numbers and odd page headers in Annex
A have changed.
[42] p.191(r141/r142):
Misspelling corrected in page heading: "Conditon" --> "Condition"
[43] p.195(r141/r142),
"Move Integer Register on Register Condition (MOVR)":
Order of instructions in Suggested Assembly Language Syntax
was rearranged to correspond to order of the instructions
in the Opcode/op3/Operation table above it.
"movre" and "movrz", as the assembly-language
mnemonic and its synonym, were exchanged to correspond with
the instruction name of MOVRZ.
"movrne" and "movrnz", as the assembly-language
mnemonic and its synonym, were exchanged to correspond with
the instruction name of MOVRNZ.
[44] p.212(r14[123])
A.43(r14[12])/A.44(r144), second page of the Read
State Register instruction descirption, 4th paragraph SHOULD
read:
"RDFPRS waits for all pending FPops **and
loads of floating-point registers** to complete before reading
the FPRS register."
[45] p.216(r142),
A.46(r142), RESTORED page:
Correct the equation with CLEANWIN to read
" (CLEANWIN
< (NWINDOWS-1))".
[46] p.220(r142)/A.49(r142),
third paragraph:
The words "the" and "and" were transposed in the implementation
dependency description. It now reads:
"The location of the SIR_enable control
flag and the means of accessing the SIR_enable control flag..."
[47] p.228(r141/r142):
Order of instructions in Suggested Assembly Language Syntax
was rearranged to correspond to order of the instructions
in the Opcode/op3/Operation table above it.
[48] (duplicate
of erratum #15)
[49] p.231(r142)/233(r144),
Annex A:
Corrected SWAP deprecation note to recommend use of "CASA"
or "CASXA" (not "CASX") in place of SWAP.
[50] p.234, A.58(r14[12])/A.59(r144),
Tagged Add:
op3 opcodes are wrong. Both should have "0" for low-order
bit (as is correctly specified in Appendix E).
[51] p.241(r142),
A.62(r142), Write State Register page:
Added footnote to Suggested Assembly
Language Syntax table, noting that the suggested syntax
for WRASR with rd=16..31 may vary, citing reference to implementation
dependency #48. (Suggested Assembly Language Syntax is just
that -- *suggested* -- so isn't a normative part of the
architecture specification anyway, but this makes it clearer
that if bits are interpreted differently in the instruction,
one should expect its assembly- language syntax to change,
as well)
[52] p.242(r142),
A.62(r142), Write State Register page:
In the Exceptions section, "WRASR with rs1=16..31" now reads
"WRASR with rd=16..31".
[53] p.253(r142),
Annex C:
Fixed 6 incorrect index entries.
[54] p.253(4142),
Annex C:
Added a new Implementation Dependency:
| # |
Cat |
Def/Ref |
Description |
| 127 |
f |
52, 56 |
The presence and semantics of PSTATE.PID1
and PSTATE.PID0 are implementation-dependent. The presence
of TSTATE bits 19 and 18 is implementation-dependent.
If PSTATE bit 11 (10) is implemented, TSTATE bit 19 (18)
shall be implemented and contain the state of PSTATE bit
11 (10) from the previous trap level. If PSTATE bit 11
(10) is not implemented, TSTATE bit 19 (18) shall read
as zero. Software intended to run on multiple implementations
should only write these bits to values previously read
from PSTATE, or to zeroes. |
[55] p.255(r142),
Annex C:
Added implementation dependency #126.
(see correction #31 above for the text of implementation dependency
#126)
[56] p.258(r142),
D.3.3., rule (1):
The text was clarified, to read:
"(1) The execution of Y is conditional on X, and S(Y) is true."
[57] p.268(r142),
Table 32:
As a privileged instruction, "RDPR" should be listed with
a superscripted suffix "P".
[58] p.290(r142),
Section G, Table 43:
Insert "#" before the "ASI" in the compare-and-swap synthetic
instruction entries.
| Corrections
58-on have been incorporated into R1.4.6, which has not
yet been published. |
[59] In Figure
3 in Chapter 6 (p.62), the 4th format description
from the bottom of the page (op,rd,op3,rs1,i=0,--,rs2) contains
an error; "i=0" should read "i=1".
[60] In section
6.3.1, "Memory Access Instructions", on p.67,
"and CAS accesses words or doublewords.
" should be amended to read:
"CASA accesses words, and CASXA acesses doublewords."
[61] In section
7.7, the async_data_error exception description should be
updated to read as follows:
async_data_error [tt = 0x040] (Precise,
Deferred, or Disrupting) -- An implementation-dependent exception
(impl. dep. #31) that indicates that one or more unrecoverable
or uncorrectable but recoverable errors have been detected
in the processor. This may include errors detected in the
architectural registers (general-purpose registers, floating-point
registers, ASRs, or ASI registers) and other core processor
hardware. A single async_data_error exception may indicate
multiple errors and may occur asynchronously to instruction
execution. An async_data_error exception may cause a precise,
deferred, or disrupting trap. When async_data_error causes
a disrupting trap, the TPC and TNPC stacked by the trap do
not necessarily indicate the instruction or data access that
caused the error.
[62] The following
text should be added to the second paragraph of section A.27
(p.176), to clarify the behavior of a little-endian doubleword
load (LDD):
With respect to little endian memory, an
LDD instruction behaves as if it is composed of two 32-bit
loads, each of which is byte swapped independently before
being written into each destination register.
[63] The following
text should be added to the second paragraph of section A.28
(p.178), to clarify the behavior of a little-endian doubleword
load from alternate space (LDDA):
With respect to little endian memory, an
LDDA instruction behaves as if it is composed of two 32-bit
loads, each of which is byte swapped independently before
being written into each destination register.
[64] In the Index,
p.354, the "signal monitor instruction" index entry
should instead read "software intiated reset (SIR) instruction".
[65] There is an
error in the definition of CLEANWIN (p.59) and
the SAVE instruction that allows the locals of the "invalid"
window to in some cases not be cleaned (zeroed) when it is
allocated by a SAVE instruction.
A software workaround (used in the Solaris
operating system and perhaps others), to keep user registers
clean of kernel data, involves the use of an extra %wstate
value. When the kernel returns to user code, it sets %wstate
to the new value. The new trap table entry for spills with
that %wstate value spills the window as usual but also backs
up a window and performs the missing "clean" operation. The
spill handler then sets %wstate back to the default value
for a user process.
[66] In Chapter
7, "Traps", it is implied (but not explicitly stated)
that the value PSTATE.TLE is preserved during traps that cause
entry into RED_state and during XIR, WDR, and SIR resets.
However, PSTATE.TLE may be left in an undefined states by
one of those events. The correction, which applies to sections
<IP_ADDRESS> (p.106), <IP_ADDRESS> (p.108), <IP_ADDRESS> (p.109), and <IP_ADDRESS>
(p.110) is to change the little-ending mode settings from:
PSTATE.CLE <-- PSTATE.TLE (set endian
mode for traps)
to:
PSTATE.CLE <-- PSTATE.TLE (set endian mode for traps)
PSTATE.TLE <-- undefined
[67] In Chapter
5, section <IP_ADDRESS> (p.48),
the last sentence of the
third paragraph is inaccurate. The entire third paragraph
should
be replaced with:
Floating-point operations which cause an
overflow or underflow condition may also cause an "inexact"
condition. For overflow and underflow conditions, FSR.cexc
bits are set and trapping occurs as follows:
o If an IEEE 754 overflow condition occurs:
-- if OFM=0 and NXM=0, the cexc.ofc and
cexc.nxc bits are both set to 1, the other three bits of
cexc are set to 0, and
an IEEE_754_exception trap does *not* occur.
-- if OFM=0 and NXM=1, the cexc.nxc bit is set to 1, the
other four bits of cexc are set to 0, and and an IEEE_754_exception
trap *does* occur.
-- if OFM=1, the cexc.ofc bit is set to 1, the other four
bits of cexc are set to 0, and an IEEE_754_exception trap
*does* occur.
o If an IEEE 754 underflow condition occurs:
-- if UFM=0 and NXM=0, the cexc.ufc
and cexc.nxc bits are both set to 1, the other three bits
of cexc are set to 0, and an IEEE_754_exception trap does
*not* occur.
-- if UFM=0 and NXM=1, the cexc.nxc bit is set to 1, the other
four bits of cexc are set to 0, and an IEEE_754_exception
trap *does* occur.
-- if UFM=1, the cexc.ufc bit is set to 1, the other four
bits of cexc are set to 0, and an IEEE_754_exception trap
*does* occur.
The above behavior is summarized in the
following table
(x = don't-care):
| Exception(s) |
|
|
|
|
|
Current |
| Detected |
|
Trap Enable |
|
|
|
Exception |
| in f.p. |
|
Mask Bits |
|
IEEE_754_ |
Bits (in |
| operation |
(in FSR.TEM) |
|
exception |
|
FSR.cexc) |
| ---- |
--- |
-- |
----- |
----- |
----- |
|
Trap |
|
--- |
--- |
--- |
---- |
| of |
uf |
nx |
OFM |
UFM |
NXM |
|
Occurs? |
|
ofc |
ufc |
nxc |
Notes |
| ---- |
--- |
-- |
----- |
----- |
----- |
|
------- |
|
--- |
--- |
--- |
---- |
|
-
|
-
|
-
|
x
|
x
|
x
|
|
no
|
|
0
|
0
|
0
|
|
|
-
|
-
|
*
|
x
|
x
|
0
|
|
no
|
|
0
|
0
|
1
|
|
|
-
|
*
|
*
|
x
|
0
|
0
|
|
no
|
|
0
|
1
|
1
|
(1)
|
|
*
|
-
|
*
|
0
|
x
|
0
|
|
no
|
|
1
|
0
|
1
|
(2)
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
-
|
-
|
*
|
x
|
x
|
1
|
|
yes
|
|
0
|
0
|
1
|
|
|
-
|
*
|
*
|
x
|
0
|
1
|
|
yes
|
|
0
|
0
|
1
|
|
|
-
|
*
|
-
|
x
|
1
|
x
|
|
yes
|
|
0
|
1
|
0
|
|
|
-
|
*
|
*
|
x
|
1
|
x
|
|
yes
|
|
0
|
1
|
0
|
|
|
*
|
-
|
*
|
1
|
x
|
x
|
|
yes
|
|
1
|
0
|
0
|
(2)
|
|
*
|
-
|
*
|
0
|
x
|
1
|
|
yes
|
|
0
|
0
|
1
|
(2)
|
(1) When the underflow trap is disabled
(UFM=0), underflow is always accompanied by inexact.
(2) Overflow is always accompanied by inexact.
[68] In Appendix
B, section B.3 (p.245), the first paragraph:
"Underflow occurs if the exact
unrounded result has magnitude
between zero and the smallest normalized number in the
destination format."
should be replaced by the following two
paragraphs:
"On an implementation that
detects tininess before rounding, trapped underflow occurs
when the exact unrounded result has magnitude between zero
and the smallest normalized number in the destination format.
On an implementation that detects tininess
after rounding, trapped underflow occurs when the result,
if it was rounded to a hypothetical format having the same
precision as the destination but of unbounded range, would
have magnitude between zero and the smallest normalized
number in the actual destination format."
[69] In
Appendix B, section B.4 (p.245), the first two
paragraphs:
The first paragraph:
"Underflow occurs if
the exact unrounded result has magnitudebetween zero and the
smallest normalized number in thedestination format, *and*
the correctly rounded result in the destination format is
inexact."
should be replaced by the following paragraph:
On an implementation that detects
tininess before rounding, untrapped underflow occurs when
the exact unrounded result has magnitude between zero and
the smallest normalized number in the destination format,
*and* the correctly-rounded result in the destination format
is inexact."
And the beginning of the second paragraph:
"Table 28 summarizes
what happens when an exact ..."
should be modified to read:
"Table 28 summarizes what happens on an implementation
that detects tininess before rounding, when an exact ..."
[70] In
Appendix B, Table 28, "Untrapped Floating-Point Underflow"
(p.245): Table 28 (and its footnote) should be
replaced by the following revised table and text:
Table 28: Untrapped Floating-Point Underflow
(Tininess Detected Before Rounding)
| |
Underflow trap mask:
|
UFM=1 |
UFM=0 |
UFM=0 |
| |
Inexact trap mask:
|
NXM=x |
NXM=x |
NXM=0 |
| |
|
|
|
|
|
| u = r |
|
r is minimum normal |
none |
none |
none |
| |
|
r is subnormal |
UF |
none |
none |
| |
|
r is zero |
none |
none |
none |
| |
|
|
|
|
|
| u ! = r |
|
r is minimum normal |
UF |
NX |
uf nx |
| |
|
r is subnormal |
UF |
NX |
uf nx |
| |
|
r is zero |
UF |
NX |
uf nx |
| |
|
|
|
|
|
|
UF = IEEE_754_exception trap with
cexc.ufc=1
|
|
NX = IEEE_754_exception trap with
cexc.ufc=1
|
| |
|
|
|
uf = cexc.ufc=1, aexc.ufa=1, no IEEE_754_exception
trap
|
|
nx = cexc.nxc=1, aexc.nxa=1, no IEEE_754_exception
trap
|
In an implementation that detects tininess
after rounding, Table 28 applies to a narrower range of values
of the exact unrounded result u. The precise bounds depend
on the rounding direction specified in FSR.RD, as follows:
o Let m denote the smallest normalized
number and e the absolute difference between 1 and the next
larger representable number in the destination format. Then
the bounds on u for which Table 28 applies are:
|
|
Rounding |
|
|
FSR.RD
|
Toward |
Range of Values of u |
|
-------------
|
------------ |
--------------------- |
|
0
|
nearest |
|u| < m(1 - e/4) |
|
1
|
0 |
|u| < m |
|
2
|
+infinity |
-m < u <= m(1 - 2/2) |
|
3
|
-infinity |
-m(1 - e/2) <= u <
m |
o When u lies outside these ranges, underflow
does not occur,
although an inexact exception still occurs when u != r, the
rounded value.
[71] In Appendix
A, section A.40, "No Operation" (p.204):
For clarity, in the instruction format
diagram the eterm "op" should be replaced by five
zeroes.
[72] In Appendix
A, section A.53, "Store Integer" (p.227):
The following paragraph should be added near the
end of the Description subsection, prior to the Programming
Note, to clarify the behavior of a little-endian doubleword
store (STD):
"With respect to little-endian memory,
a STD instruction behaves as if it is composed of two 32-bit
stores, each of which is byte-swapped independently before
being written into its respective destination memory word."
[73] In Appendix
A, section A.54, "Store Integer Into Alternate Space"
(p.229):
The following paragraph should be added near the
end of the Description subsection, prior to the Programming
Note, to clarify the behavior of a little-endian doubleword
store to alternate space (STDA):
"With respect to little-endian memory,
a STDA instruction behaves as if it is composed of two 32-bit
stores, each of which is byte-swapped independently before
being written into its respective destination memory word."
[74] In Chapter
7, reference is made in two places to a range of trap priorities,
with 0 as the highest priority and 31 as the lowest.
Architecturally, there are no absolute trap priorities (only
relative trap priorities) and there is no specific limit to
trap priority numbers. Trap priorities are only used by a
processor to choose which exception will cause a trap at any
given time; a trap priority is an ordinal number which need
not be stored anywhere. Therefore, the following changes should
be noted:
Caption above Table
15, p.101:
Change:
"0
= Highest; 31 = Lowest"
to:
"0
= Highest"
Text of first paragraph of section 7.5.3
on p.102:
Change:
"Priority 0 is highest, priority 31 is lowest; that is,
if......."
to:
"A trap priority is an ordinal number, with 0 indicating
the highest priority and greater priority numbers
indicating decreasing priority; that is, if......"
|


HI Irshaad
Please see email below and attached.
Kind Regards
Megan Singh
Associate
Switchboard:<PHONE_NUMBER>
Facsimile:<PHONE_NUMBER>
Email:
<EMAIL_ADDRESS>Disclaimer


Definition in file BLDC.h.
This graph shows which files directly or indirectly include this file:
Go to the source code of this file.
Defines | |
| #define | ADC_MUX_CURRENT 0x3 |
| ADC multiplexer selection for current sampling. | |
| #define | ADC_MUX_REF_VOLTAGE 0x5 |
| ADC multiplexer selection for reference voltage sampling. | |
| #define | ADC_MUX_SPEED_REF 0x4 |
| ADC multiplexer selection for speed reference sampling. | |
| #define | ADC_MUX_U 0x0 |
| ADC multiplexer selection for channel U sampling. | |
| #define | ADC_MUX_V 0x1 |
| ADC multiplexer selection for channel V sampling. | |
| #define | ADC_MUX_W 0x2 |
| ADC multiplexer selection for channel W sampling. | |
| #define | ADC_PRESCALER ADC_PRESCALER_8 |
| ADC prescaler used. | |
| #define | ADC_PRESCALER_16 ((1 << ADPS2) | (0 << ADPS1) | (0 << ADPS0)) |
| ADC clock prescaled by 8 value. | |
| #define | ADC_PRESCALER_8 ((0 << ADPS2) | (1 << ADPS1) | (1 << ADPS0)) |
| ADC clock prescaled by 8 value. | |
| #define | ADC_REF_CHANNEL ((0 << REFS1) | (0 << REFS0)) |
| ADC reference channel selection. | |
| #define | ADC_RES_ALIGNMENT_BEMF (1 << ADLAR) |
| ADC result alignment for BEMF measurement. | |
| #define | ADC_RES_ALIGNMENT_CURRENT (1 << ADLAR) |
| ADC result alignment for CURRENT measurement. | |
| #define | ADC_RES_ALIGNMENT_REF_VOLTAGE (1 << ADLAR) |
| ADC result alignment for reference voltage measurement. | |
| #define | ADC_RES_ALIGNMENT_SPEED_REF (1 << ADLAR) |
| ADC result alignment for speed reference measurement. | |
| #define | ADC_RESOLUTION 256 |
| The ADC resolution used. | |
| #define | ADC_TRIGGER_SOURCE ((1 << ADTS2) | (0 << ADTS1) | (0 << ADTS0)) |
| ADC trigger source. | |
| #define | ADC_ZC_THRESHOLD 0x98 |
| Zero-cross threshold. | |
| #define | ADMUX_CURRENT (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_CURRENT | ADC_MUX_CURRENT) |
| ADMUX register value for current sampling. | |
| #define | ADMUX_REF_VOLTAGE (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_REF_VOLTAGE | ADC_MUX_REF_VOLTAGE) |
| ADMUX register value for reference voltage sampling. | |
| #define | ADMUX_SPEED_REF (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_SPEED_REF | ADC_MUX_SPEED_REF) |
| ADMUX register value for speed reference sampling. | |
| #define | ADMUX_U (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_BEMF | ADC_MUX_U) |
| ADMUX register value for channel U sampling. | |
| #define | ADMUX_V (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_BEMF | ADC_MUX_V) |
| ADMUX register value for channel V sampling. | |
| #define | ADMUX_W (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_BEMF | ADC_MUX_W) |
| ADMUX register value for channel W sampling. | |
| #define | ANALOG_COMPARATOR_ENABLE |
| #define | CCW 1 |
| Counterclockwise rotation flag. Used only in macros. | |
| #define | CLEAR_ALL_TIMER0_INT_FLAGS (TIFR0 = TIFR0) |
| Macro that clears all Timer/counter0 interrupt flags. | |
| #define | CLEAR_ALL_TIMER1_INT_FLAGS (TIFR1 = TIFR1) |
| Macro that clears all Timer/Counter1 interrupt flags. | |
| #define | COMMUTATION_CORRECTION 50 |
| #define | COMMUTATION_TIMING_IIR_COEFF_A 1 |
| Input value relative gain in IIR filter. | |
| #define | COMMUTATION_TIMING_IIR_COEFF_B 3 |
| Relative feedback gain in IIR filter. | |
| #define | CURRENT_LIMITER_CRITICAL 3000 |
| The current value in milliAmpere where the motor should be shut down. | |
| #define | CURRENT_LIMITER_FACTOR (1 / 5) |
| #define | CURRENT_LIMITER_START 2500 |
| The current value in milliAmpere where the current limiter starts to kick in. | |
| #define | CW 0 |
| Clockwise rotation flag. Used only in macros. | |
| #define | DIRECTION_OF_ROTATION CCW |
| #define | DISABLE_ALL_TIMER0_INTS (TIMSK0 = 0) |
| Macro that disables all Timer/Counter0 interrupts. | |
| #define | DISABLE_ALL_TIMER1_INTS (TIMSK1 = 0) |
| Macro that disables all Timer/Counter1 interrupts. | |
| #define | DISABLE_DRIVING (DRIVE_PORT = 0x00) |
| Macro that cuts all power to the motor. | |
| #define | DRIVE_DDR DDRB |
| Data direction register for drive pattern output. | |
| #define | DRIVE_PATTERN_STEP1_CCW ((1 << UL) | (1 << VH)) |
| Drive pattern for commutation step 1, CCW rotation. | |
| #define | DRIVE_PATTERN_STEP1_CW ((1 << VH) | (1 << WL)) |
| Drive pattern for commutation step 1, CW rotation. | |
| #define | DRIVE_PATTERN_STEP2_CCW ((1 << UL) | (1 << WH)) |
| Drive pattern for commutation step 2, CCW rotation. | |
| #define | DRIVE_PATTERN_STEP2_CW ((1 << UH) | (1 << WL)) |
| Drive pattern for commutation step 2, CW rotation. | |
| #define | DRIVE_PATTERN_STEP3_CCW ((1 << VL) | (1 << WH)) |
| Drive pattern for commutation step 3, CCW rotation. | |
| #define | DRIVE_PATTERN_STEP3_CW ((1 << UH) | (1 << VL)) |
| Drive pattern for commutation step 3, CW rotation. | |
| #define | DRIVE_PATTERN_STEP4_CCW ((1 << VL) | (1 << UH)) |
| Drive pattern for commutation step 4, CCW rotation. | |
| #define | DRIVE_PATTERN_STEP4_CW ((1 << WH) | (1 << VL)) |
| Drive pattern for commutation step 4, CW rotation. | |
| #define | DRIVE_PATTERN_STEP5_CCW ((1 << WL) | (1 << UH)) |
| Drive pattern for commutation step 5, CCW rotation. | |
| #define | DRIVE_PATTERN_STEP5_CW ((1 << WH) | (1 << UL)) |
| Drive pattern for commutation step 5, CW rotation. | |
| #define | DRIVE_PATTERN_STEP6_CCW ((1 << WL) | (1 << VH)) |
| Drive pattern for commutation step 6, CCW rotation. | |
| #define | DRIVE_PATTERN_STEP6_CW ((1 << VH) | (1 << UL)) |
| Drive pattern for commutation step 6, CW rotation. | |
| #define | DRIVE_PORT PORTB |
| PORT register for drive pattern output. | |
| #define | EDGE_FALLING 1 |
| Zero crossing polarity flag value for falling zero crossing. | |
| #define | EDGE_RISING 0 |
| Zero crossing polarity flag value for rinsing zero crossing. | |
| #define | EXTERNAL_REF_VOLTAGE ((4930UL * 10) / 43) |
| External reference voltage in milliVolts. | |
| #define | FALSE 0 |
| Boolean FALSE value. | |
| #define | MAX_PWM_COMPARE_VALUE 200 |
| The maximum allowed PWM compare value. | |
| #define | MAX_RESTART_ATTEMPTS 10 |
| The maximum number of restart attempts without external action when stall is detected. | |
| #define | MAX_SPEED 8000UL |
| The maximum allowed speed. (Only has effect when closed loop speed control is used). | |
| #define | MIN_PWM_COMPARE_VALUE 90 |
| The minimum allowed PWM compare value. | |
| #define | MIN_SPEED 3000UL |
| The minimum allowed speed. (Only has effect when closed loop speed control is used). | |
| #define | P_REG_K_P 64 |
| P-regulator proportional gain. | |
| #define | P_REG_SCALING 65536 |
| P-regulator scaling factor. The result is divided by this number. | |
| #define | PWM_BASE_FREQUENCY 20000 |
| PWM base frequency. Used to calculate PWM TOP value. | |
| #define | PWM_TOP_VALUE (SYSTEM_FREQUENCY / PWM_BASE_FREQUENCY / 2) |
| PWM TOP value. Automatically calculated to give desired PWM_BASE_FREQUENCY. | |
| #define | SET_PWM_COMPARE_VALUE(compareValue) (OCR0B = compareValue) |
| Macro that sets a new duty cycle by changing the PWM compare value. | |
| #define | SET_TIMER0_INT_ZC_DETECTION (TIMSK0 = (1 << TOIE0)) |
| Macro that enables Timer/Counter0 interrupt where zero crossings are detected. | |
| #define | SET_TIMER1_INT_COMMUTATION (TIMSK1 = (1 << OCIE1A)) |
| Macro that enable Timer/Counter1 interrupt responsible for commutation. | |
| #define | SET_TIMER1_INT_HOLDOFF (TIMSK1 = (1 << OCIE1B)) |
| Macro that enables Timer/Counter1 interrupt responsible for enabling ADC sampling after ADC holdoff period. | |
| #define | SHUNT_RESISTANCE 220 |
| Current measurement shunt value in milliOhm. | |
| #define | SPEED_CONTROL_OPEN_LOOP |
| Uncomment one of the following lines to choose open or closed loop speed control. | |
| #define | STARTUP_DELAY_MULTIPLIER 100 |
| Startup delays are given in milliseconds times STARTUP_DELAY_MULTIPLIER. | |
| #define | STARTUP_LOCK_DELAY 10000 |
| #define | STARTUP_NUM_COMMUTATIONS 8 |
| #define | STARTUP_PWM_COMPARE_VALUE 130 |
| PWM compare value used during startup. | |
| #define | SYSTEM_FREQUENCY 8000000 |
| System clock frequecy. Used to calculate PWM TOP value. | |
| #define | TICKS_PER_MINUTE (TICKS_PER_SECOND * 60) |
| The number of Timer/Counter1 ticks per minute. | |
| #define | TICKS_PER_SECOND 1000000UL |
| #define | TRUE (!FALSE) |
| Boolean TRUE expression. Can be used both for test and assignment. | |
| #define | UH PB4 |
| Port pin connected to phase U, high side enable switch. | |
| #define | UL PB5 |
| Port pin connected to phase U, low side enable switch. | |
| #define | VH PB2 |
| Port pin connected to phase V, high side enable switch. | |
| #define | VL PB3 |
| Port pin connected to phase V, low side enable switch. | |
| #define | WH PB0 |
| Port pin connected to phase W, high side enable switch. | |
| #define | WL PB1 |
| Port pin connected to phase W, low side enable switch. | |
| #define | ZC_DETECTION_HOLDOFF_TIME_US (filteredTimeSinceCommutation / 2) |
| Holdoff time where zero-cross detection is disabled after commutation. | |
Functions | |
| static unsigned int | CalculateCurrent () |
| static unsigned long | CalculateSpeed () |
| static unsigned long | CalculateSpeedSetpoint () |
| static unsigned char | CurrentControl (void) |
| static void | InitADC (void) |
| static void | InitAnalogComparator (void) |
| static void | InitPorts (void) |
| static void | InitTimers (void) |
| static void | MakeTables (void) |
| static void | PWMControl (void) |
| static void | ResetHandler (void) |
| static signed int | SpeedControl (void) |
| static void | StartMotor (void) |
| static void | StartupDelay (unsigned int delay) |
| Generates a delay used during startup. | |
| static void | WatchdogTimerEnable (void) |
|
|
ADC multiplexer selection for current sampling.
|
|
|
ADC multiplexer selection for reference voltage sampling.
|
|
|
ADC multiplexer selection for speed reference sampling.
|
|
|
ADC multiplexer selection for channel U sampling.
|
|
|
ADC multiplexer selection for channel V sampling.
|
|
|
ADC multiplexer selection for channel W sampling.
|
|
|
ADC prescaler used.
Definition at line 177 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
ADC clock prescaled by 8 value.
Definition at line 174 of file BLDC.h. Referenced by InitADC(). |
|
|
ADC clock prescaled by 8 value.
Definition at line 171 of file BLDC.h. Referenced by InitADC(). |
|
|
ADC reference channel selection.
|
|
|
ADC result alignment for BEMF measurement.
|
|
|
ADC result alignment for CURRENT measurement.
|
|
|
ADC result alignment for reference voltage measurement.
|
|
|
ADC result alignment for speed reference measurement.
|
|
|
The ADC resolution used.
Definition at line 234 of file BLDC.h. Referenced by CalculateSpeedSetpoint(), and PWMControl(). |
|
|
ADC trigger source.
Definition at line 180 of file BLDC.h. Referenced by InitADC(). |
|
|
Zero-cross threshold.
Definition at line 290 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
ADMUX register value for current sampling.
Definition at line 165 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
ADMUX register value for reference voltage sampling.
Definition at line 168 of file BLDC.h. Referenced by InitADC(), and MotorPWMBottom(). |
|
|
ADMUX register value for speed reference sampling.
Definition at line 162 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
ADMUX register value for channel U sampling.
Definition at line 153 of file BLDC.h. Referenced by MakeTables(). |
|
|
ADMUX register value for channel V sampling.
Definition at line 156 of file BLDC.h. Referenced by MakeTables(). |
|
|
ADMUX register value for channel W sampling.
Definition at line 159 of file BLDC.h. Referenced by MakeTables(). |
|
|
Uncomment the following line if the analog comparator should be used to detect overcurrent. |
|
|
Counterclockwise rotation flag. Used only in macros.
|
|
|
Macro that clears all Timer/counter0 interrupt flags.
Definition at line 207 of file BLDC.h. Referenced by CurrentMeasurementComplete(), and EnableZCDetection(). |
|
|
Macro that clears all Timer/Counter1 interrupt flags.
Definition at line 216 of file BLDC.h. Referenced by Commutate(), EnableZCDetection(), MotorPWMBottom(), and StartupDelay(). |
|
|
The number of milliseconds to subtract from the zero-crossing to commutation time. Used to compensate for zero-cross sample frequency. Definition at line 296 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
Input value relative gain in IIR filter. This value specifies the relative gain given to the input value in the IIR filter. The value should be an integer. Make sure that COEFF_A + COEFF_B is a power of 2, to avoid instability. Definition at line 251 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
Relative feedback gain in IIR filter. This value specifies the relative feedback gain given to the input value in the IIR filter. The value should be an integer. Make sure that COEFF_A + COEFF_B is a power of 2, to avoid instability. Definition at line 259 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
The current value in milliAmpere where the motor should be shut down.
Definition at line 269 of file BLDC.h. Referenced by CurrentControl(). |
|
|
The maximum duty cycles is decreased by this number of PWM duty cycle steps per milliAmpere current consumption over CURRENT_LIMITER_START. Definition at line 281 of file BLDC.h. Referenced by CurrentControl(). |
|
|
The current value in milliAmpere where the current limiter starts to kick in.
Definition at line 266 of file BLDC.h. Referenced by CurrentControl(). |
|
|
Clockwise rotation flag. Used only in macros.
|
|
|
Direction of rotation. Set to either CW or CCW for clockwise and counterclockwise respectively. |
|
|
Macro that disables all Timer/Counter0 interrupts.
Definition at line 210 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
Macro that disables all Timer/Counter1 interrupts.
Definition at line 219 of file BLDC.h. Referenced by EnableZCDetection(). |
|
|
Macro that cuts all power to the motor.
Definition at line 284 of file BLDC.h. Referenced by OverCurrentISR(), and WatchdogISR(). |
|
|
Data direction register for drive pattern output.
Definition at line 117 of file BLDC.h. Referenced by InitPorts(). |
|
|
Drive pattern for commutation step 1, CCW rotation.
Definition at line 71 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 1, CW rotation.
Definition at line 90 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 2, CCW rotation.
Definition at line 74 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 2, CW rotation.
Definition at line 93 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 3, CCW rotation.
Definition at line 77 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 3, CW rotation.
Definition at line 96 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 4, CCW rotation.
Definition at line 80 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 4, CW rotation.
Definition at line 99 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 5, CCW rotation.
Definition at line 83 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 5, CW rotation.
Definition at line 102 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 6, CCW rotation.
Definition at line 86 of file BLDC.h. Referenced by MakeTables(). |
|
|
Drive pattern for commutation step 6, CW rotation.
Definition at line 105 of file BLDC.h. Referenced by MakeTables(). |
|
|
PORT register for drive pattern output.
Definition at line 114 of file BLDC.h. Referenced by Commutate(), CurrentControl(), and StartMotor(). |
|
|
Zero crossing polarity flag value for falling zero crossing.
Definition at line 108 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
Zero crossing polarity flag value for rinsing zero crossing.
Definition at line 111 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
External reference voltage in milliVolts.
Definition at line 228 of file BLDC.h. Referenced by CalculateCurrent(). |
|
|
Boolean FALSE value.
|
|
|
The maximum allowed PWM compare value.
Definition at line 302 of file BLDC.h. Referenced by PWMControl(). |
|
|
The maximum number of restart attempts without external action when stall is detected.
Definition at line 198 of file BLDC.h. Referenced by ResetHandler(). |
|
|
The maximum allowed speed. (Only has effect when closed loop speed control is used).
Definition at line 308 of file BLDC.h. Referenced by CalculateSpeedSetpoint(). |
|
|
The minimum allowed PWM compare value.
Definition at line 299 of file BLDC.h. Referenced by PWMControl(). |
|
|
The minimum allowed speed. (Only has effect when closed loop speed control is used).
Definition at line 305 of file BLDC.h. Referenced by CalculateSpeedSetpoint(). |
|
|
P-regulator proportional gain.
Definition at line 311 of file BLDC.h. Referenced by SpeedControl(). |
|
|
P-regulator scaling factor. The result is divided by this number.
Definition at line 314 of file BLDC.h. Referenced by SpeedControl(). |
|
|
PWM base frequency. Used to calculate PWM TOP value.
|
|
|
PWM TOP value. Automatically calculated to give desired PWM_BASE_FREQUENCY.
Definition at line 33 of file BLDC.h. Referenced by InitTimers(). |
|
|
Macro that sets a new duty cycle by changing the PWM compare value.
Definition at line 204 of file BLDC.h. Referenced by PWMControl(), and StartMotor(). |
|
|
Macro that enables Timer/Counter0 interrupt where zero crossings are detected.
Definition at line 213 of file BLDC.h. Referenced by EnableZCDetection(). |
|
|
Macro that enable Timer/Counter1 interrupt responsible for commutation.
Definition at line 222 of file BLDC.h. Referenced by MotorPWMBottom(). |
|
|
Macro that enables Timer/Counter1 interrupt responsible for enabling ADC sampling after ADC holdoff period.
Definition at line 225 of file BLDC.h. Referenced by Commutate(). |
|
|
Current measurement shunt value in milliOhm.
Definition at line 231 of file BLDC.h. Referenced by CalculateCurrent(). |
|
|
Uncomment one of the following lines to choose open or closed loop speed control.
|
|
|
Startup delays are given in milliseconds times STARTUP_DELAY_MULTIPLIER.
Definition at line 189 of file BLDC.h. Referenced by StartMotor(), and StartupDelay(). |
|
|
Number of milliseconds to lock rotor in first commutation step before the timed startup sequence is initiated. Definition at line 195 of file BLDC.h. Referenced by StartMotor(). |
|
|
Number of commutations performed during startup. Also specifies size of startupDelays. Do not change without also changing MakeTables(). Definition at line 186 of file BLDC.h. Referenced by StartMotor(). |
|
|
PWM compare value used during startup.
Definition at line 287 of file BLDC.h. Referenced by StartMotor(). |
|
|
System clock frequecy. Used to calculate PWM TOP value.
|
|
|
The number of Timer/Counter1 ticks per minute.
Definition at line 243 of file BLDC.h. Referenced by CalculateSpeed(). |
|
|
The number of Timer/Counter1 ticks per second. Equals MCU clock frequency / Timer/counter1 prescaler. |
|
|
Boolean TRUE expression. Can be used both for test and assignment.
Definition at line 39 of file BLDC.h. Referenced by CurrentMeasurementComplete(), and MotorPWMBottom(). |
|
|
Port pin connected to phase U, high side enable switch.
Definition at line 45 of file BLDC.h. Referenced by InitPorts(). |
|
|
Port pin connected to phase U, low side enable switch.
Definition at line 42 of file BLDC.h. Referenced by CalculateCurrent(), and InitPorts(). |
|
|
Port pin connected to phase V, high side enable switch.
Definition at line 51 of file BLDC.h. Referenced by InitPorts(). |
|
|
Port pin connected to phase V, low side enable switch.
Definition at line 48 of file BLDC.h. Referenced by InitPorts(). |
|
|
Port pin connected to phase W, high side enable switch.
Definition at line 57 of file BLDC.h. Referenced by InitPorts(). |
|
|
Port pin connected to phase W, low side enable switch.
Definition at line 54 of file BLDC.h. Referenced by InitPorts(). |
|
|
Holdoff time where zero-cross detection is disabled after commutation.
Definition at line 201 of file BLDC.h. Referenced by Commutate(). |
|
|
Referenced by CurrentControl(). |
|
|
Referenced by SpeedControl(). |
|
|
Referenced by SpeedControl(). |
|
|
|
|
|
Referenced by main(). |
|
|
Referenced by main(). |
|
|
Referenced by main(). |
|
|
Referenced by main(). |
|
|
Referenced by main(). |
|
|
Referenced by main(). |
|
|
Referenced by main(). |
|
|
|
|
|
Referenced by main(). |
|
|
Generates a delay used during startup. This functions is used to generate a delay during the startup procedure. The length of the delay equals delay * STARTUP_DELAY_MULTIPLIER microseconds. Since Timer/Counter1 is used in this function, it must never be called when sensorless operation is running. Definition at line 593 of file main.c. References CLEAR_ALL_TIMER1_INT_FLAGS, and STARTUP_DELAY_MULTIPLIER. Referenced by StartMotor(). 00594 { 00595 CLEAR_ALL_TIMER1_INT_FLAGS; 00596 do 00597 { 00598 TCNT1 = 0xffff - STARTUP_DELAY_MULTIPLIER; 00599 // Wait for timer to overflow. 00600 while (!(TIFR1 & (1 << TOV1))) 00601 { 00602 00603 } 00604 00605 CLEAR_ALL_TIMER1_INT_FLAGS; 00606 delay--; 00607 } while (delay); 00608 }
|
|
|
Referenced by main(). |


Manny Marx is passionate about what he does and his dedication to his work as well as his commitment to the vision of those he works with truly brings the music he records to life. He is fluent in his abilities as an engineer and is more than willing to go the extra mile to get your music to sound the way you hear it in your head. He dove in and put his heart into my project, Arm’s Length, by correspondents, helping me to bring it to life when few other engineers would have been as patient and open-minded to the unorthodox approach I chose to take in recording. He believed in what I was doing as much as I did and that faith, coupled with his technical skills, made recording with him a memorable and meaningful experience.
With nothing but a time-limit and a feeling I'm trying to achieve, Manny delivers tracks that suit my work, flow, and editing style perfectly. His tunes give my videos a unique edge that my clients and YouTube viewers love.
"I am a 2D & 3D artist who creates drawing videos and animations. Manny is very intuitive, conceptual and industrial in creating music that fits the various genres, moods and concepts that my art & videos encompass. He knows how to quickly compliment and accentuate work on many different levels! It's a pleasure working with him."
Manny and I have collaborated many times over a few decades. His perspectives and approaches to music are utterly unique and are indispensable to me as a music partner and a listener.
Manny's music has given several of our videos the additional impact they needed. Prolific, hardworking and always professional, I know I can always rely on Manny to deliver.
As a pro kickboxer, I rely on my entrance music to create an electric atmosphere as I head to the ring for battle. I have been lucky enough to have Manny Marx create personal tracks for me on many occasions. His songs not only pump me up for my up coming match, but also bring the crowd to their feet!
Manny Marx has such a great range to his sound. I've got his music on three of my podcasts. His sci-fi jam is good for fireside chilling and just plain fun. It all sounds great.
I had the pleasure of collaborating with Manny Marx on The Uchujins. His track production is eclectic and translated great to high energy live shows. Truly one of most unique artists I've come across.


Event Trace
Create
Before Play
After Play
Before Pause
After Pause
Before Forward
After Forward
Before Rewind
After Rewind
Before Play Next
After Play Next
Before Play Previous
After Play Previous
Before Stop
After Stop
Before Mute
After Mute
Before Volume Change
After Volume Change
Before Media Change
After Media Change
Before Screen Change
After Screen Change
Media Complete


Graph Search is an experimental feature and might contain stale and test data.
Graph Search enables you to explore relationships/interactions between samples and external entities.
Fill in the fields or click on an example query to try out.
select all human (organism = Homo Sapiens) samples which has a link to hPSCreg
select all human (organism = Homo Sapiens) samples which has sequencing data in ENA and has
other DERIVED FROM samples in BioSamples
select all samples which has data in ENA and has any relationship to samples in EGA
select all human samples which has sequencing data in ENA and has other DERIVED FROM female
samples in BioSamples and have data in ENA


Marcel Penney Media
Marcel Penney Media
Customizable responsive web design and development
Marcel Penney Media
dropown
Drop 1
drop 2
Drop 3
Link 2
Link 3
Link 4


I am a Designer, Developer, Red Hatter, Mozillian et al.Soumya Deb, at Mobile Developer Summit — Bangalore, 2013
{
"name": "My App",
"description": "My elevator pitch goes here",
"launch_path": "/",
"icons": { "128": "/img/icon-128.png" },
"developer": {
"name": "Your name or organization",
"url": "http://your-homepage-here.org"
}
}
Soumya Deb, at Mobile Developer Summit — Bangalore, 2013
var manifestURL = "http://your.app/webapp.manifest",
installer = navigator.mozApps.install(manifestURL);
installer.onsuccess = function(data) {
// App is installed
};
installer.onerror = function() {
// App installation failed...
// Check installapp.error.name for details
};
Soumya Deb, at Mobile Developer Summit — Bangalore, 2013
The Manifest file also lists permissions.


Mike Lazos
Home
About
Projects
Posts
Reading List
Posts
Notes on CallCC
- September 16, 2021
A Recursive Generating Function for Partial Sums of Pascal's Triangle
- July 6, 2021
Decoding Devil's Chess
- July 3, 2020
Cross-Domain Distribution Matching with Triangle GANs
- December 28, 2017


Last updated: 2021-10-19
Checks: 1 1
Knit directory: myTidyTuesday/
This reproducible R Markdown analysis was created with workflowr (version 1.6.2). The Checks tab describes the reproducibility checks that were applied when the results were created. The Past versions tab lists the development history.
The R Markdown file has unstaged changes. To know which version of the R Markdown file created these results, you’ll want to first commit it to the Git repo. If you’re still working on the analysis, you can ignore this warning. When you’re finished, you can run wflow_publish
to commit the R Markdown file and build the HTML.
Great! You are using Git for version control. Tracking code development and connecting the code version to the results is critical for reproducibility.
The results in this page were generated with repository version 485e867. See the Past versions tab to see a history of the changes made to the R Markdown and HTML files.
Note that you need to be careful to ensure that all relevant files for the analysis have been committed to Git prior to generating the results (you can use wflow_publish
or wflow_git_commit
). workflowr only checks the R Markdown file, but you know if there are other scripts or data files that it depends on. Below is the status of the Git repository when the results were generated:
Ignored files:
Ignored: .Rhistory
Ignored: .Rproj.user/
Ignored: catboost_info/
Ignored: data/2021-10-12/
Ignored: data/2021-10-13/
Ignored: data/CNHI_Excel_Chart.xlsx
Ignored: data/CommunityTreemap.jpeg
Ignored: data/Community_Roles.jpeg
Ignored: data/YammerDigitalDataScienceMembership.xlsx
Ignored: data/accountchurn.rds
Ignored: data/acs_poverty.rds
Ignored: data/advancedaccountchurn.rds
Ignored: data/airbnbcatboost.rds
Ignored: data/austinHomeValue.rds
Ignored: data/austinHomeValue2.rds
Ignored: data/australiaweather.rds
Ignored: data/baseballHRxgboost.rds
Ignored: data/baseballHRxgboost2.rds
Ignored: data/fmhpi.rds
Ignored: data/grainstocks.rds
Ignored: data/hike_data.rds
Ignored: data/nber_rs.rmd
Ignored: data/netflixTitles2.rds
Ignored: data/pets.rds
Ignored: data/pets2.rds
Ignored: data/spotifyxgboost.rds
Ignored: data/spotifyxgboostadvanced.rds
Ignored: data/us_states.rds
Ignored: data/us_states_hexgrid.geojson
Ignored: data/weatherstats_toronto_daily.csv
Untracked files:
Untracked: code/YammerReach.R
Untracked: code/work list batch targets.R
Unstaged changes:
Modified: analysis/about.Rmd
Note that any generated files, e.g. HTML, png, CSS, etc., are not included in this status report because it is ok for generated content to have uncommitted changes.
These are the previous versions of the repository in which changes were made to the R Markdown (analysis/about.Rmd
) and HTML (docs/about.html
) files. If you’ve configured a remote Git repository (see ?wflow_git_remote
), click on the hyperlinks in the table below to view the files as they were in that past version.
| File | Version | Author | Date | Message |
|---|---|---|---|---|
| html | fa6e99d | opus1993 | 2021-09-24 | refresh About page for personal note and license for word wraps |
| Rmd | 5639d00 | opus1993 | 2021-09-24 | personal website comment |
| html | 1be040c | opus1993 | 2021-09-08 | Build site. |
| Rmd | 8e8d42d | opus1993 | 2021-09-08 | rephrase about note |
| Rmd | 91bef3d | opus1993 | 2021-09-07 | initial commit about and license |
| html | 91bef3d | opus1993 | 2021-09-07 | initial commit about and license |
| Rmd | f1bb186 | opus1993 | 2021-09-07 | Start workflowr project. |
This is my personal website.
No. I could not have built this site without lots of help. This site is gratefully built using a variety of open-source resources and inspirations. John Blischak’s workflowr
package, blog posts, and talks provide the reproducible github pages framework that this is built on. I rely a great deal on the work of the worldwide open source R community.
Mostly. I own all work on this site and any site wherein I share content, unless I attributed it to someone else, in which case then they hold the copyrights. I try to capture the source of that which I share but sometimes I forget to, and then all I have is the content itself without a trackback for attribution. This does not mean that I imply ownership. If you feel that I have posted something without permission, please let me know and I will correct it.
Copyright is at once a simple and a complicated matter. Most of the 📜 legal framework around copyright was set into place before the Internet came onto the scene and is biased towards large corporations rather than creative individuals. No matter what my opinion on the matter is, the current copyright regime is the law and affects almost all usage of creative materials. Wikipedia’s copyright page has a lot of good information. (As an aside, you should donate to Wikimedia, and you should also support efforts to keep Wikipedia complete.) Basically, none of the content here can be reprinted without letting folks know where you got it.
You may re-use this content as long as you indicate my authorship and provide a link back to the original material. Source code of the site is provided under the MIT license and may be reused without restriction.
No. I also don’t keep any information about you. That’s a policy, I guess. Voilà.
For what it’s worth, if you have not been careful about your browsing habits and setup, I 🕵 can probably see a lot of “anonymized” information about you. It’s 😱 pretty scary when you think about it. You can use Tor if you want to keep your connection information anonymous and protect your privacy. You can also opt out of many of these services. You should also know that I use many intermediary services to make this page possible, and accept no responsibility for any liability attributable to any of them. As far as I’m aware, all services I knowingly use have a privacy and protection compliant data retention policy. There are also services I could use because they are bundled with other services I use to build and host this page. There are no affiliate links and I do not make (even fractional) money from anything you click on this website.
All mine. Any views or opinions presented herein are solely mine and do not represent those of any company I have been, currently am, or will ever be associated with. The postings on this site and any site wherein I share content, including but not limited to Twitter, LinkedIn, etc. are my own and don’t represent my employer’s (or anyone else’s) positions, strategies, or opinions.
My opinions are my own; I’m not online to represent anyone or anything other than myself. I love my job in particular and gainful employment in general; please do not endanger any of them.
Carefully. When I talk about 💰 monetary quantities, please note that they are discussed in original year indices, and do not account for price-index, capital market, or inflation adjustments.
Sometimes. We can’t escape the matter of semantic and semiotic instabilities, which are only compounded by the fallibility of our sensory mechanisms in objectively describing reality.
Frankly, in the grand scheme of things (with regards to the vast majority of human knowledge), most of the time 🤠 I have no idea what I’m talking about. As an engineer, an individually contributing data scientist, and even a Boy Scout leader, I tend to simplify things in order to be able to understand them. I may also be bound here and there by non-disclosure, non-disparagement, and other negotiated and non-negotiated agreements. So… take it all in with a grain of salt.
Please keep in mind at all times that I am not a lawyer ⚖, a doctor 💉, or a journalist 🗞; There are more things that I am not an expert in than there are things in which I am an expert.
I make no guarantees as to the accuracy, relevance, or quality of the content herein. I make no guarantees as to anything else herein either. I accept no liability for issues with the content of links (due to reasons including but not limited to deprecation, machine error, human error, human success, or meteor impact), or for the consequences of any actions taken on the basis of the information provided. Risks are inherent in the use of the Internet 🛰. Contact your vendors for additional information.
Maybe. Not everything I share publicly happened exactly as I said it did. There are many reasons why this could be true 🤥, not least of which are that my memory is fallible; sometimes I’m sharing a composite anecdote; sometimes I may be trying to protect the innocent (and the guilty for reasons that may be none of your business); and sometimes I’ll say something hyperbolically or in jest and you shouldn’t take everything you read or see on the internet at face value. There are very few oaths I’ve taken in my life, and those I take very very seriously; anything else might just be a shitpost.
If you want to 💬 quote me, ask me for confirmation before alleging I said something and meant it?
Who knows? But just so you know, if you choose to comment or tweet at me about stuff I’m not interested in or in an aggressive, sea-lioning manner, then I’ll just mute you. 😏 You won’t even know. Or I’ll block you. If you have an opinion, good for you—you don’t necessarily need to tell me about it. You do you.
Fun fact: that’s not censorship.
I also do not reply to 🗑 cold emails from vendors or service providers. If you’re looking for a surefire way of getting on my “mute” list, this would be it.
Again, no idea. I reserve the right to evolve my opinions and to change my mind altogether on any topic at any time with no notice. Listening and learning and thinking and growing 🤓 are inherently good things and I refuse to steadfastly hold onto an idea simply because it’s the way it’s always been idea’ed. Consequently, I delete my bad tweets. I delete good ones too, in case they didn’t land quite right or if I want to rephrase them.
I also delete ✂ conversations that are no longer relevant, especially if I’ve tried to have a constructive dialog with you only to realize that you’re not actually having a conversation in good faith and are rather demonstrating a willful and pervasive form of aggressive cluelessness masquerading as a sincere desire to understand.
Write a github issue. But I’m zen 😌 about it: the formatting is just going to be bad sometimes. Call it personal growth: I’m allowing it to stay bad and not obsessing over it. Really, I’m not secretly obsessing 😳 over each and every broken carriage return.
You betcha. By loading and continuing to use this webpage and any platform wherein I share content, you agree to comply with my terms, as such may be revised from time to time without notice.
You agree to 🔓 release me from all obligations and waivers arising from any and all non-negotiated agreements, licenses, terms-of-service, shrinkwrap, clickwrap, browsewrap, confidentiality, non-disclosure, non-compete, and acceptable use policies that I have entered into with you or your employer, its partners, licensors, agents and assigns, in perpetuity and throughout the universe, in any timeline, without prejudice to my ongoing rights and privileges.
You further represent that you have the authority ✍ to release me from any such agreements on behalf of your past, current, and future employers.
You also agree to release me from all arbitration and/or moderation dispute clauses, even those which I may have previously agreed to in non-negotiated contracts.
And since I’m on a roll 🎲, I’d also like to take this opportunity to notify all service providers involved in the creation, distribution, and storage of this site and any platform wherein I share content of my decision to opt out of arbitration with them too.
Not really, unless we’ve worked together. Basically, if it’d feel inappropriate for me to ask you a professional favor, or if it’d be awkward if I did you a favor just because… then it’s unlikely that we’ll connect on LinkedIn.
No. There is no advertising on my site. In fact, I pay someone to host this, so you are actually costing me money being here. You should feel bad 😞 for doubting my integrity.
I also do not pay for marketing. 🙅 Please do not inquire.
Well… Since you’ve been reading this far, I feel empowered to ask you to support live, local music and the youth organizations in your own communities. Adopt a pet from a shelter and care for it. Join a recreational biking or hiking club. Invest in making your community a place where others want to be.
Citation:
Blischak JD, Carbonetto P, and Stephens M. Creating and sharing reproducible research code the workflowr way [version 1; peer review: 3 approved]. F1000Research 2019, 8:1749 (https://doi.org/10.12688/f1000research.20843.1)


Whether to Weather the Weather
Plan your next outdoor adenture here!
Sunny
Home
Preston
Soda Springs
Fish Haven
Storm Center
Gallery


Store Inventories
Pick a Product to buy
Product Id:
Product Quantity:
My Cart
Add to Cart
Check Out
Log Out


You can create a new DIV using --- or @@@ at the start of a new line. The complete syntax is:
The class prefix is optional, but handy if you want your DIV to be styled in a unique way. You can list one or more classes in dotted notation. E.g.: {:.myclass} or {:.myclass1.myclass2}. Then an optional class for the title, or '.' to indicate no title class, and finally, the optional title. Let's take a look at an example:
When I write {:.section}@@@ divTitle This is my new DIV section at the start of a new line, I get this:
This is my new DIV section
If I indent subsequent lines immediately following the DIV declaration, they become part of the DIV as a regular paragraph. For example, I'll add four (4) indented lines immediately after the previous DIV declaration and I get this:
This is my new DIV section
This is line 1
This is line 2
This is line 3
This is line 4
There are a several built-in CSS classes that are defined in the accompanying avscript_md.css file, and you can add your own to get new DIVs formatted to your liking.
Just like in standard Markdown, you can use the # symbol at the beginning of a line to designate an HTML <H1> element. ## symbols designate an <H2> element, and so on, up to ###### for <H6>. Here are examples of each.
And this is how they will look in the document when it's formatted:
You may want to style the headers to your liking in the avscript_md.css file.
You can also define bookmarks in your document, and then reference them with links using the following syntax:
This is useful for creating things like a table of contents (TOC) for your document, or anywhere that you want to provide a hyperlink to a different part of your doc. These do not have to be defined in any particular order. That is, you can create the hyperlink before the bookmark has been defined.
For an example of bookmarks, just take a look at how this user guide defined and uses its own TOC.


Once the new member receives the full sync script, the dispatcher automatically puts it in the Inbox tab of the project in question.
Full sync scripts are often very large and they may be broken into chunks for distribution. The dispatcher will retrieve each chunk as it arrives and, once all the chunks are received, it will reconstruct the full sync script.
Push the Execute button and let Code Co-op work its magic recreating a complete copy of the project. From this point on you can check out files, manipulate them, and check them back in.
Keep in mind...
With large projects, creating the full sync and unpacking the full sync may take time. Often it takes no more than a couple minutes, but be prepared for a longer wait for large projects over 100Mb.
See also side-by-side comparison of various ways of enlisting in a project.


Getting started¶
Introduction¶
SCP stands for ‘Spectrograph Control Package’ and lvmscp is the actor that controls the lower level actors which are controlling devices inside the spectrograph. lvmscp is based on the sdss software framework CLU. Among them, ‘sdss-clu’ is applied to create an actor that controls each hardware and executes communication.
In ‘CLU’, We define what an actor is: and actor is a piece of software that performs a well defined task (control a CCD camera, interface with a database) and is a server that receives commands and replies with a series of keywords. If you are not familiar with those concepts, the CLU’s documentation is a good reference place.
Quick Start¶
Prerequisite¶
Install CLU by using PyPI.
$ pip install sdss-clu
Install RabbitMQ by using apt-get.
$ sudo apt-get install -y erlang
$ sudo apt-get install -y rabbitmq-server
$ sudo systemctl enable rabbitmq-server
$ sudo systemctl start rabbitmq-server
Install pyenv by using pyenv installer.
$ curl https://pyenv.run | bash
You should add the code below to ~/.bashrc
by using your preferred
editor.
# pyenv
export PYENV_ROOT="$HOME/.pyenv"
export PATH="$PYENV_ROOT/bin:$PATH"
eval "$(pyenv init -)"
eval "$(pyenv init --path)"
eval "$(pyenv virtualenv-init -)"
pyenv
builds Python from source. So you should install build
dependencies. For more information, check Common build
problems.
$ sudo apt-get install -y make build-essential libssl-dev zlib1g-dev \
libbz2-dev libreadline-dev libsqlite3-dev wget curl llvm libncurses5-dev \
libncursesw5-dev xz-utils tk-dev libffi-dev liblzma-dev python-openssl
Clone this repository.
$ git clone https://github.com/sdss/lvmscp
$ cd lvmscp
Set the python 3.9.1 virtual environment.
$ pyenv install 3.9.1
$ pyenv virtualenv 3.9.1 lvmscp-with-3.9.1
$ pyenv local lvmscp-with-3.9.1
Install poetry and dependencies. For more information, check sdss/archon.
$ pip install poetry
$ python create_setup.py
$ pip install -e .
Start the actor¶
Start lvmscp
actor inside your virtualenv directory.
$ lvmscp start
In another terminal, type clu
and lvmscp ping
for test.
$ clu
lvmscp ping
07:41:22.636 lvmscp >
07:41:22.645 lvmscp : {
"text": "Pong."
}
Stop lvmscp
actor.
$ lvmscp stop
Hardware Components¶
Here is the Hardware and Software Component diagram in spectrograph.
Architecture¶
Here is the Architecture and component diagram explaining the hierarchy of lvmscp. lvmscp is using the AMQP Actor class from clu which is based on RabbitMQ protocol, and each actor becomes a producer/consumer to activate commands.


One Piece Pirate Warriors 4 release date confirmed for March
by Aran SuddiBandai Namco has confirmed that One Piece Pirate Warriors 4 will be releasing on March 27th 2020 with the game coming to PS4, Xbox One, Switch, and PC. To mark this announcement the publisher released a brand new trailer which shows a lot of the characters from the manga being quite shouty. The game will also feature an original ending due to the fact the manga itself is still ongoing.
Along with the release date Bandai Namco announced a series of bonuses. Everyone who gets the game will get the following Wano costumes:
- Luffytaro (Luffy)
- Zorojuro (Zoro)
- Soba Mask (Sanji)
- Onami (Nami)
Those who pre-order One Piece Pirate Warriors 4 will get additional content in the form of an early unlock of the characters Vinsmoke Brothers Ichiji, Niji and Yonji as well as two additional costumes. There’s also a special edition called the Kaido edition which will feature a diorama of Luffy and Kaido clashing. Dom had a look at the predecessor One Piece Pirate Warriors 3 on Switch and said the following:
Switch-owning Musou fans should definitely check out One Piece: Pirate Warriors 3 and help Luffy and his crew on their voyage, no matter where you are.
You can read that review here.
Source: Press Release